A low-power high-speed driving circuit for spatial light modulators

• Published in: Journal of semiconductors Vol. 33; no. 2; pp. 133 - 137
• Main Author: 朱明皓 朱从义 李文江 张耀辉
• Format: Journal Article
• Language: English
• Published: 01.02.2012
• Subjects: Circuit design; Circuits; DAC; Dissipation; Electric potential; High speed; Pixels; Semiconductors; Spatial light modulators; 低功耗; 光调制器驱动电路; 控制逻辑电路; 数据传输速率; 模拟转换器; 移位寄存器; 空间光调制器
• ISSN: 1674-4926
• DOI: 10.1088/1674-4926/33/2/025013

This paper describes the design and test of a novel custom driving circuit for multi-quantum-well （MQW） spatial light modulators（SLMs）.Unlike previous solutions,we integrated all blocks in one chip to synchronize the control logic circuit and the driving circuits.Single-slope digital-to-analog converters（DACs） inside each pixel are not adopted because it is difficult to eliminate capacitor mismatch.64 column-shared 8-bit resistor-string DACs are utilized to provide programmable output voltages from 0.5 to 3.8 V.They are located on the top of 64×64 driving pixels tightly to match each other with several dummies.Each DAC performs its conversion in 280 ns and draws 80μA.For a high speed data transfer rate,the system adopts a 2-stage shift register that operates at 50 MHz and the modulating rate achieves 50 K frames/s while dissipating 302 mW from a 5-V supply.The die is fabricated in a 0.35 /μm CMOS process and its area is 5.5 x 7 mm~2.