Study of process induced variability of germanium-pTFET in analog and RF domain
Germanium (Ge) tunnel field effect transistor (TFET) is considered to be an excellent solution to resolve the low on-currents issue of Silicon-based TFETs. Whereas, process variability in any low technology node devices (sub-100nm) is a crucial subject of matter which affects the device reliability...
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| Published in | Microelectronics and reliability Vol. 65; pp. 47 - 54 |
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| Main Authors | , , |
| Format | Journal Article |
| Language | English |
| Published |
Elsevier Ltd
01.10.2016
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| Online Access | Get full text |
| ISSN | 0026-2714 1872-941X |
| DOI | 10.1016/j.microrel.2016.07.149 |
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| Abstract | Germanium (Ge) tunnel field effect transistor (TFET) is considered to be an excellent solution to resolve the low on-currents issue of Silicon-based TFETs. Whereas, process variability in any low technology node devices (sub-100nm) is a crucial subject of matter which affects the device reliability and dependability in advanced SoC applications. In this brief, we have investigated the two main process induced variability a) the thickness of the germanium body b) the thickness of gate oxide in Ge-pTFET using Sentaurus TCAD device simulation. The analysis is performed in complete analog domain along with the study of intrinsic RF performance parameters using small signal equivalent model with non-quasi static effect of the device under consideration. The process induced variability is estimated on the figure of merits (FOMs) such as drain current (Ids), transconductance (gm), output resistance (Ro), intrinsic gain (gmRo), unity-gain cutoff frequency (fT), transit frequency of maximum available power gain (fMAX), transport delay (τm), intrinsic resistance (Rgd) and intrinsic capacitances (Cgs, Cgd).
•Germanium (Ge) tunnel field effect transistor•Germanium body tunnel FET for analog/RF application.•Process variability of tunnel FET |
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| AbstractList | Germanium (Ge) tunnel field effect transistor (TFET) is considered to be an excellent solution to resolve the low on-currents issue of Silicon-based TFETs. Whereas, process variability in any low technology node devices (sub-100nm) is a crucial subject of matter which affects the device reliability and dependability in advanced SoC applications. In this brief, we have investigated the two main process induced variability a) the thickness of the germanium body b) the thickness of gate oxide in Ge-pTFET using Sentaurus TCAD device simulation. The analysis is performed in complete analog domain along with the study of intrinsic RF performance parameters using small signal equivalent model with non-quasi static effect of the device under consideration. The process induced variability is estimated on the figure of merits (FOMs) such as drain current (Ids), transconductance (gm), output resistance (Ro), intrinsic gain (gmRo), unity-gain cutoff frequency (fT), transit frequency of maximum available power gain (fMAX), transport delay (τm), intrinsic resistance (Rgd) and intrinsic capacitances (Cgs, Cgd).
•Germanium (Ge) tunnel field effect transistor•Germanium body tunnel FET for analog/RF application.•Process variability of tunnel FET |
| Author | Koley, Kalyan Sarkar, Chandan K. Ghosh, Sayani |
| Author_xml | – sequence: 1 givenname: Sayani surname: Ghosh fullname: Ghosh, Sayani email: sayani.ghs@gmail.com – sequence: 2 givenname: Kalyan surname: Koley fullname: Koley, Kalyan – sequence: 3 givenname: Chandan K. surname: Sarkar fullname: Sarkar, Chandan K. |
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| Cites_doi | 10.1109/TED.2007.899389 10.1109/TED.2009.2030831 10.1016/j.sse.2006.07.005 10.1109/LED.2007.901276 10.1109/LED.2010.2047240 10.1016/0038-1101(94)E0050-O 10.1109/LED.2007.901273 10.1109/TNANO.2006.869946 10.1109/TED.2011.2109724 10.1109/TED.2003.818594 10.1109/16.784191 10.1109/TED.2008.925937 10.1109/TED.2013.2287031 10.1016/j.microrel.2014.10.008 10.1109/TED.2007.901882 |
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