Very large scale integration implementation of efficient finite impulse response filter architectures using novel distributed arithmetic for digital channelizer of software defined radio

• Published in: International journal of circuit theory and applications Vol. 51; no. 3; pp. 1153 - 1167
• Main Authors: Bhadavath, Kiran Kumar, Livinsa, Z. Mary
• Format: Journal Article
• Language: English
• Published: Bognor Regis Wiley Subscription Services, Inc 01.03.2023
• Subjects: Application specific integrated circuits; Arithmetic; Art works; ASIC; Binary codes; block processing; Complexity; Computer architecture; Delay; digital channelizer; FIR filter; FIR filters; Large scale integration; Mathematical analysis; Multiplication; OBC‐DA; Parallel processing; Power consumption; reconfigurable filter; Reconfiguration; SDR; Software radio; Very large scale integration

Always an efficient and low complexity reconfigurable filter architecture is required for the channel filters of digital channelizer in software‐defined radio (SDR). In this paper, a block‐based reconfigurable finite impulse response (FIR) filter is proposed using distributed arithmetic (DA) techniq...