Fault-Tolerant Design of Spaceborne Mass Memory System

• Published in: Transactions of Tianjin University Vol. 16; no. 1; pp. 17 - 21
• Main Author: 张宇宁 常亮 杨根庆 李华旺
• Format: Journal Article
• Language: English
• Published: Heidelberg Tianjin University 01.02.2010; Shanghai Microsatellite Engineering Center, Shanghai 200050, China%Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China; Graduate School of Chinese Academy of Sciences, Beijing 100039, China; Shanghai Microsatellite Engineering Center, Shanghai 200050, China; Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China
• Subjects: Engineering; Humanities and Social Sciences; Mechanical Engineering; multidisciplinary; Science; parallel Reed-Solomon codec; fault-tolerant memory architecture; data integrity
• ISSN: 1006-4982; 1995-8196
• DOI: 10.1007/s12209-010-0004-7

A fault-tolerant spaceborne mass memory architecture is presented based on entirely commercial-off-theshelf components.The highly modularized and scalable memory kernel supports the hierarchical design and is well suited to redundancy structure.Error correcting code(ECC) and periodical scrubbing are used to deal with bit errors induced by single event upset.For 8-bit wide devices, the parallel Reed Solomon(10, 8) can perform coder/decoder calculations in one clock cycle, achieving a data rate of several Gb/...