Time Resolved Gate Oxide Stress of 4H-SiC Planar MOSFETs and NMOS Capacitors

Lateral SiC MOSFETs and NMOS capacitors were fabricated and electrically evaluated for channel mobility, DIT and gate oxide breakdown. Time resolved measurements of VTH and VFB drift during gate bias stress were performed resulting in logarithmic time dependence for moderate stress time and temperat...

Full description

Saved in:
Bibliographic Details
Published inMaterials Science Forum Vol. 858; pp. 611 - 614
Main Authors Domeij, Martin, Allerstam, Fredrik, Buono, Benedetto, Gumaelius, Krister
Format Journal Article
LanguageEnglish
Published Pfaffikon Trans Tech Publications Ltd 24.05.2016
Subjects
Bias
Capacitors
Drift
Gates
Metal oxide semiconductors
MOSFETs
Oxides
Stresses
MOSFET
Bias Temperature Instability
Oxide Traps
Reliability
Online AccessGet full text

Cover

More Information
Summary:Lateral SiC MOSFETs and NMOS capacitors were fabricated and electrically evaluated for channel mobility, DIT and gate oxide breakdown. Time resolved measurements of VTH and VFB drift during gate bias stress were performed resulting in logarithmic time dependence for moderate stress time and temperature. Gate bias stress was also carried out during 20 hours at temperatures up to 225 C. Stress times resulting in a VTH shift of 500 mV were determined and an activation energy EA=0.86 eV was extracted for the VTH drift.
Bibliography:Selected, peer reviewed papers from the 16th International Conference on Silicon Carbide and Related Materials, October 4-9, 2015, Giardini Naxos, Italy
ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 23
ISBN:3035710422
9783035710427
ISSN:0255-5476
1662-9752
1662-9752
DOI:10.4028/www.scientific.net/MSF.858.611