Fault-tolerant Algebraic Interleaver Architecture for IDMA Systems in Harsh Environments
In this paper, a fault-tolerant algebraic interleaver architecture is presented for interleave division multiple access (IDMA) systems operating in harsh environments. Since the multiuser detection procedure is performed chipby-chip according to an interleaving pattern, it is of paramount importance...
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Published in | Journal of semiconductor technology and science Vol. 25; no. 2; pp. 191 - 198 |
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Main Author | |
Format | Journal Article |
Language | English |
Published |
대한전자공학회
01.04.2025
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Subjects | |
Online Access | Get full text |
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Summary: | In this paper, a fault-tolerant algebraic interleaver architecture is presented for interleave division multiple access (IDMA) systems operating in harsh environments. Since the multiuser detection procedure is performed chipby-chip according to an interleaving pattern, it is of paramount importance to keep track of the current index at all times. To protect the interleaving index in a register from soft errors, an encoder and a decoder associated with an error-correcting code are added. Moreover, to mitigate the latency overhead of such an architecture, the encoder is merged with an essential logic that precomputes the next index. As a result, the proposed interleaver tolerates soft errors while suppressing the latency overhead. KCI Citation Count: 0 |
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ISSN: | 2233-4866 1598-1657 1598-1657 2233-4866 |
DOI: | 10.5573/JSTS.2025.25.2.191 |