EF-CIM: An Endurance Friendly CIM Accelerator Using Embedded NVM With Bit-Aware Wear Leveling for Efficient Light-Weight On-Chip Training in Edge Devices

• Published in: IEEE transactions on circuits and systems. I, Regular papers pp. 1 - 13
• Main Authors: Guo, Zhiwang, Jiang, Jingwen, Chen, Deyang, Fang, Jinbei, Yang, Jianguo, Han, Jun, Xue, Xiaoyong, Zeng, Xiaoyang
• Format: Journal Article
• Language: English
• Published: IEEE 2024
• Subjects: Artificial intelligence; bit-aware wear leveling; computing-in-memory; edge devices; Embedded nonvolatile memory; endurance; In-memory computing; Kernel; Nonvolatile memory; on-chip training; Performance evaluation; Phase change random access memory; Random access memory; Switches; System-on-chip; Training

Computing-in-memory (CIM) based on embedded nonvolatile memory (NVM) realizes energy-efficient acceleration of convolution neural network (CNN) with less data movement and high computing parallelism. Because the deployment environments for edge devices are usually subject to changes, it is necessary...