Employ Present Five Masks Amorphous Silicon Thin-Film Transistor Design and Process Flow to Realize 5-in. InGaZnO Active-Matrix Liquid Crystal Display with Improved Stress Stability

The present five masks bottom gate and staggered amorphous silicon (a-Si) thin-film transistor (TFT) process flow is not suitable for indium--gallium--zinc-oxide (IGZO) TFT because of its vulnerability to post etching process during the source/drain pattern. Bottom gate and coplanar IGZO TFTs were m...

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Bibliographic Details
Published inJapanese Journal of Applied Physics Vol. 50; no. 3; pp. 03CB07 - 03CB07-4
Main Authors Hung, Ming-Chin, Hsiao, Hsia-Tsai, Lin, Wei-Ting, Tu, Chun-Hao, Chang, Jiun-Jye, Chen, Po-Lun
Format Journal Article
LanguageEnglish
Published The Japan Society of Applied Physics 01.03.2011
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Summary:The present five masks bottom gate and staggered amorphous silicon (a-Si) thin-film transistor (TFT) process flow is not suitable for indium--gallium--zinc-oxide (IGZO) TFT because of its vulnerability to post etching process during the source/drain pattern. Bottom gate and coplanar IGZO TFTs were made feasible through the reverse of second (channel layer) and third (source/drain electrodes) masks process flow to avoid etching damage problem. Besides, the post IGZO nitrous oxygen (N 2 O) plasma treatment was employed to improve the stress instability. On the basis of secondary ion mass spectrometry (SIMS) and X-ray spectroscopy (XPS) results, it is believed that the post N 2 O plasma treatment passivates the interface states and converts the inhomogeneous and low quality IGZO to the homogeneous and high quality IGZO. In the end, a 5-in. IGZO active-matrix liquid crystal display was demonstrated via five masks bottom gate and coplanar TFT configuration.
Bibliography:Bottom gate staggered and coplanar TFT process flow. The fifth mask for the indium tin oxide (ITO) is not included for the simplicity. Transfer curves of six IGZO TFTs ($W/L = 22/5$) on the $320\times 400$ mm 2 glass substrate. The evolution of transfer curves under (a) PBTS or (b) NBTS. The insets show the $V_{\text{th}}$ shifts for a-Si and IGZO TFTs under the same stress condition after 2000 s. The evolution of $V_{\text{th}}$ shifts for PBTS and NBTS of a-Si TFTs and IGZO TFTs with (a) SiO x or (b) SiN x as the gate dielectric material. The insets show the $V_{\text{th}}$ shifts for a-Si and IGZO TFTs under the same stress condition after 2000 s. The evolution of transfer curves for IGZO TFTs with N 2 O plasma treatment under (a) PBTS or (b) NBTS condition. The evolution of $V_{\text{th}}$ shifts for PBTS and NBTS of a-Si TFTs and IGZO TFTs after N 2 O plasma treatment with (a) SiO x or (b) SiN x as the gate dielectric material. The insets show the $V_{\text{th}}$ shifts for a-Si and IGZO TFTs under the same stress condition after 2000 s. (a) XPS depth profile of normal IGZO and N 2 O plasma treated IGZO (b) SIMS depth profile of In 2 O 3 within IGZO (c) SIMS depth profile of Ga 2 O 3 within IGZO (d) SIMS depth profile of ZnO within IGZO. The image of 5-in. IGZO AM-LCD panel.
ISSN:0021-4922
1347-4065
DOI:10.1143/JJAP.50.03CB07