Quantification of Substrate Current Caused by an Individual Trap at Different Locations and Energies, Prevailing on Si/SiO₂ Interface or Si Substrate of n-MOSFETs

• Published in: Journal of semiconductor technology and science Vol. 22; no. 4; pp. 234 - 243
• Main Authors: Shahzadi, Nosheen, Baeg, Sanghyeon
• Format: Journal Article
• Language: English
• Published: 대한전자공학회 01.08.2022
• Subjects: 전기공학; MOSFET; TCAD simulations; shallow and deep level traps; low time; Si/SiO₂ interface

Traps on Si/SiO2 interface or Si substrate are a big source of variability that cause the mismatch of transistors’ performance and leads to failure. To have a comprehensive view of individual traps, causing random fluctuations, variable trap locations are considered on Si/SiO2 interface and Si subst...