High-PSRR Low-dropout Regulator with Fast Transient Response Time and Low Output Peak Voltage - Kim, Nahyun; Song, Junyoung (Journal of semiconductor technology and science, 2021)
This study proposes the feed-forward ripple cancellation (FFRC) technique to low drop-out (LDO) regulator. By adding load tracking impedance to the gate of pass transistor, it is possible to secure stability with a 100-nF capacitor having low ESR and be obtained less than 35 ns response time. In all frequency bands, a power supply rejection ratio (PSRR) less than -70 dB is obtained when the load current is 10 mA. The circuit is implemented in 65-nm CMOS process. KCI Citation Count: 0