An Integrated High-Precision Probe System in 0.18- \mu CMOS for Near-Field Magnetic Measurements on Cryptographic LSIs

• Published in: IEEE sensors journal Vol. 13; no. 7; pp. 2675 - 2682
• Main Authors: Nguyen Ngoc Mai-Khanh, Iizuka, T., Yamada, M., Morita, O., Asada, K.
• Format: Journal Article
• Language: English
• Published: IEEE 01.07.2013
• Subjects: CMOS; focused-ion-beam; Integrated circuit; near-field magnetic probe; on-chip inductor; sensing
• ISSN: 1530-437X; 1558-1748
• DOI: 10.1109/JSEN.2013.2258334

This paper presents a fully integrated magnetic probe with a multistage low-noise amplifier (LNA) in a 0.18-μm CMOS process to measure and analyze near-field magnetic map on cryptography LSI chips. is used to pick up near-field magnetic. A three-stage controllable-gain differential LNA integrated with an on-chip inductor used to pick up magnetic near-field amplifies induced voltages of the coil. Moreover, a focused-ion-beam technique is applied to sputter away the Si-substrate area underneath the coil to enhance the coil's performance. A high and controllable-gain amplifier stage with self-bias cascade structure is also proposed for the last-stage LNA. Total gain of the LNA is achieved up to 63 dB at 17.37 MHz in HSPICE post-layout simulation. A high-precision mechanical scanning and monitoring system for the probe are implemented in this paper. Two probes are fabricated with two on-chip pick-up coils with different sizes of 100-μm × 100-μm and 500-μm × 100-μm. Comparisons of two coils are also performed, both in simulation and in measurements. First, evaluations of these probes are performed by measuring the emission of a 100-μm-width microstrip-line through probes' output and the high-precision scanning system. Then, a probe with 100-μm × 100-μm coil and the scanning system are applied to measure and build 7-mm × 9-mm 2-D-distributed magnetic-field maps of a field-programmable gate array (FPGA) operating with a 24-MHz clock on an advanced-encryption-standard encryption core. Magnetic noise maps of the FPGAs surface with several frequency bands are achieved to identify sensitive areas of the clock's information.