From LIF to AdEx neuron models: Accelerated analog 65 nm CMOS implementation

Here we present analog circuits emulating an Adaptive Exponential I&F (AdEx) neuron model developed for our second generation 65-nm CMOS neuromorphic hardware. Designed for an existing accelerated Leaky Integrate and Fire (LIF) circuit, the modular circuit architecture allows us to switch betwee...

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Bibliographic Details
Published in2017 IEEE Biomedical Circuits and Systems Conference (BioCAS) pp. 1 - 4
Main Authors Aamir, Syed Ahmed, Muller, Paul, Kriener, Laura, Kiene, Gerd, Schemmel, Johannes, Meier, Karlheinz
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2017
Subjects
65 nm CMOS
Acceleration
Adaptation
Adaptation models
AdEx
Analog integrated circuits
Biological system modeling
Computational modeling
Exponential
Integrated circuit modeling
Leaky Integrate-and-Fire
LIF
Neuromorphic
Neuron
Neurons
Semiconductor device modeling
Spiking
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Summary:Here we present analog circuits emulating an Adaptive Exponential I&F (AdEx) neuron model developed for our second generation 65-nm CMOS neuromorphic hardware. Designed for an existing accelerated Leaky Integrate and Fire (LIF) circuit, the modular circuit architecture allows us to switch between LIF and AdEx neuron models and further to multiple-compartments. We describe our circuit implementation and the simulation results for adaptation and exponential sub-circuits. The neuron circuit specifications are compared with a targeted set of computational models. We show how addition of analog AdEx circuits let us qualitatively reproduce spike patterns known from cortical neurons.
DOI:10.1109/BIOCAS.2017.8325167