Directed Assembly of p-Type Tellurium Nanowires for Room-Temperature-Processed Thin-Film Transistors
The flexible electronics domain has emerged as an alternate technology beyond silicon CMOS because of advancements in low-temperature solution-processable thin-film transistors (TFTs) and circuits. However, uniformity and scalability remain the main hindrances for solution-processed devices, especia...
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Published in | IEEE journal on flexible electronics Vol. 3; no. 10; pp. 454 - 460 |
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Main Authors | , , , |
Format | Journal Article |
Language | English |
Published |
IEEE
01.10.2024
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Subjects | |
Online Access | Get full text |
ISSN | 2768-167X 2768-167X |
DOI | 10.1109/JFLEX.2025.3526083 |
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Abstract | The flexible electronics domain has emerged as an alternate technology beyond silicon CMOS because of advancements in low-temperature solution-processable thin-film transistors (TFTs) and circuits. However, uniformity and scalability remain the main hindrances for solution-processed devices, especially when it comes to the deposition of nanomaterials. In this regard, directional assembly using dielectrophoresis is a quick and easy way to uniformly align 1-D nanostructures, for example, nanowires, to bridge a gap between the electrodes to form a transistor channel using nonlinear ac electric fields. In this study, high-hole mobility tellurium nanowires are assembled using nonlinear ac dielectrophoresis to fabricate electrolyte-gated TFTs (EG-TFTs) on a flexible substrate at room temperature. These p-type flexible transistors exhibit an on-off ratio of <inline-formula> <tex-math notation="LaTeX">3.3\times 10^{2} </tex-math></inline-formula>, an ON-current density of 20 <inline-formula> <tex-math notation="LaTeX">\mu </tex-math></inline-formula>A <inline-formula> <tex-math notation="LaTeX">\mu </tex-math></inline-formula>m−1, a specific transconductance of 8.5 <inline-formula> <tex-math notation="LaTeX">\mu </tex-math></inline-formula>S <inline-formula> <tex-math notation="LaTeX">\mu </tex-math></inline-formula>m−1, and linear mobility of 20.6 cm2 V−1 s−1 with adequate mechanical strain tolerance. |
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AbstractList | The flexible electronics domain has emerged as an alternate technology beyond silicon CMOS because of advancements in low-temperature solution-processable thin-film transistors (TFTs) and circuits. However, uniformity and scalability remain the main hindrances for solution-processed devices, especially when it comes to the deposition of nanomaterials. In this regard, directional assembly using dielectrophoresis is a quick and easy way to uniformly align 1-D nanostructures, for example, nanowires, to bridge a gap between the electrodes to form a transistor channel using nonlinear ac electric fields. In this study, high-hole mobility tellurium nanowires are assembled using nonlinear ac dielectrophoresis to fabricate electrolyte-gated TFTs (EG-TFTs) on a flexible substrate at room temperature. These p-type flexible transistors exhibit an on-off ratio of <inline-formula> <tex-math notation="LaTeX">3.3\times 10^{2} </tex-math></inline-formula>, an ON-current density of 20 <inline-formula> <tex-math notation="LaTeX">\mu </tex-math></inline-formula>A <inline-formula> <tex-math notation="LaTeX">\mu </tex-math></inline-formula>m−1, a specific transconductance of 8.5 <inline-formula> <tex-math notation="LaTeX">\mu </tex-math></inline-formula>S <inline-formula> <tex-math notation="LaTeX">\mu </tex-math></inline-formula>m−1, and linear mobility of 20.6 cm2 V−1 s−1 with adequate mechanical strain tolerance. |
Author | Hadhi Pazhaya Puthanveettil, Mohammed Singh, Manvendra Dasgupta, Subho Chandana Amarakonda, Siri |
Author_xml | – sequence: 1 givenname: Mohammed orcidid: 0009-0007-8707-1205 surname: Hadhi Pazhaya Puthanveettil fullname: Hadhi Pazhaya Puthanveettil, Mohammed organization: Department of Materials Engineering, Indian Institute of Science (IISc), Bengaluru, India – sequence: 2 givenname: Manvendra orcidid: 0009-0002-9985-8148 surname: Singh fullname: Singh, Manvendra organization: Department of Materials Engineering, Indian Institute of Science (IISc), Bengaluru, India – sequence: 3 givenname: Siri orcidid: 0009-0007-0288-4478 surname: Chandana Amarakonda fullname: Chandana Amarakonda, Siri organization: Department of Materials Engineering, Indian Institute of Science (IISc), Bengaluru, India – sequence: 4 givenname: Subho orcidid: 0000-0002-3952-2952 surname: Dasgupta fullname: Dasgupta, Subho email: dasgupta@iisc.ac.in organization: Department of Materials Engineering, Indian Institute of Science (IISc), Bengaluru, India |
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SubjectTerms | Assembly Dielectrophoresis Electric fields Electrodes electrolyte gating Flexible electronics inkjet printing Nanowires Substrates Tellurium Thin film transistors thin-film transistor (TFT) Transistors |
Title | Directed Assembly of p-Type Tellurium Nanowires for Room-Temperature-Processed Thin-Film Transistors |
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