Comparative Analysis of Compact Modeled of Low-Voltage OTFTs on Flexible and Silicon Substrates for the Implementation of Logic Circuits

This article discusses the compact modeling of organic thin-film transistors (OTFTs) fabricated on both flexible and silicon substrates. These compact models are used to implement inverters, 2-input NAND gate, and half-adder circuits. For the compact modeling and circuit design, Silvaco TechModeler...

Full description

Saved in:
Bibliographic Details
Published inIEEE journal on flexible electronics Vol. 3; no. 7; pp. 341 - 347
Main Authors Singh Mehrolia, Mukuljeet, Verma, Ankit, Kumar Singh, Abhishek
Format Journal Article
LanguageEnglish
Published IEEE 01.07.2024
Subjects
Online AccessGet full text
ISSN2768-167X
2768-167X
DOI10.1109/JFLEX.2024.3471489

Cover

Abstract This article discusses the compact modeling of organic thin-film transistors (OTFTs) fabricated on both flexible and silicon substrates. These compact models are used to implement inverters, 2-input NAND gate, and half-adder circuits. For the compact modeling and circuit design, Silvaco TechModeler and Silvaco Gateway tools are utilized. Both the flexible and silicon substrate OTFTs operate at −2 V, with saturated currents of −2 and <inline-formula> <tex-math notation="LaTeX">- 3.9~\mu </tex-math></inline-formula>A, respectively. Comparative analysis using dc and transient behavior reveals that the OTFT on the flexible substrate has a delay of 3.7 ns and a gain of 4.7, while the OTFT on the silicon substrate has a delay of 5.5 ns and a gain of 3.2. The OTFT on the flexible substrate is approximately 49% faster and exhibits a gain 1.47 times higher than the OTFT on the silicon substrate. Furthermore, the OTFT on the flexible substrate successfully realizes half-adder outputs for all four input cases (00, 01, 10, and 11), whereas the OTFT on the silicon substrate fails to do so for all cases. These results demonstrate that the OTFT on the flexible substrate significantly outperforms the OTFT on the silicon substrate in terms of delay, gain, and output consistency for the given inputs. In the future, the OTFT on the flexible substrate's quick response, high gain, and reliable performance in NAND and half-adder circuits could offer advantages in the development of complex memory circuits, analog circuits, and other applications.
AbstractList This article discusses the compact modeling of organic thin-film transistors (OTFTs) fabricated on both flexible and silicon substrates. These compact models are used to implement inverters, 2-input NAND gate, and half-adder circuits. For the compact modeling and circuit design, Silvaco TechModeler and Silvaco Gateway tools are utilized. Both the flexible and silicon substrate OTFTs operate at −2 V, with saturated currents of −2 and <inline-formula> <tex-math notation="LaTeX">- 3.9~\mu </tex-math></inline-formula>A, respectively. Comparative analysis using dc and transient behavior reveals that the OTFT on the flexible substrate has a delay of 3.7 ns and a gain of 4.7, while the OTFT on the silicon substrate has a delay of 5.5 ns and a gain of 3.2. The OTFT on the flexible substrate is approximately 49% faster and exhibits a gain 1.47 times higher than the OTFT on the silicon substrate. Furthermore, the OTFT on the flexible substrate successfully realizes half-adder outputs for all four input cases (00, 01, 10, and 11), whereas the OTFT on the silicon substrate fails to do so for all cases. These results demonstrate that the OTFT on the flexible substrate significantly outperforms the OTFT on the silicon substrate in terms of delay, gain, and output consistency for the given inputs. In the future, the OTFT on the flexible substrate's quick response, high gain, and reliable performance in NAND and half-adder circuits could offer advantages in the development of complex memory circuits, analog circuits, and other applications.
Author Verma, Ankit
Singh Mehrolia, Mukuljeet
Kumar Singh, Abhishek
Author_xml – sequence: 1
  givenname: Mukuljeet
  orcidid: 0009-0009-2557-9710
  surname: Singh Mehrolia
  fullname: Singh Mehrolia, Mukuljeet
  email: mukuljeetsm@rgipt.ac.in
  organization: Department of Electrical and Electronics Engineering, RGIPT Jais, Amethi, Uttar Pradesh, India
– sequence: 2
  givenname: Ankit
  surname: Verma
  fullname: Verma, Ankit
  email: ankitv@srmist.edu.in
  organization: Department of Electronics and Communication Engineering, SRM Institute of Science and Technology, Ghaziabad, India
– sequence: 3
  givenname: Abhishek
  orcidid: 0000-0002-3786-131X
  surname: Kumar Singh
  fullname: Kumar Singh, Abhishek
  email: aks@rgipt.ac.in
  organization: Department of Electrical and Electronics Engineering, RGIPT Jais, Amethi, Uttar Pradesh, India
BookMark eNpNkNFOwjAYhRuDiYi8gPGiLzBsu67bLskCipnhAjTcLV33D2u6laxF5Q18bAdywdV_cnLO-ZPvFg1a2wJC95RMKCXp48s8n20mjDA-CXlMeZJeoSGLRRJQEW8GF_oGjZ37JISwVNAwIUP0m9lmJzvp9RfgaSvNwWmHbY1PvvL41VZgoDpauf0O3q3xcgt4uZ6v-1yL5wZ-dGkAy7bCK2206s3VvnS-HwWHa9th_wF40ewMNND6_lWfOM1ttcKZ7tRee3eHrmtpHIzPd4Te5rN19hzky6dFNs0DRUPuA1YmChhIIDGNKYiSCC5LkrAyjVTNE6XClAteklCmtapSBUQIwkQkaqliSMIRYv-7qrPOdVAXu043sjsUlBRHnMUJZ3HEWZxx9qWH_5IGgItCTGhEovAPleJ1hg
CODEN IJFEBL
Cites_doi 10.1088/1361-6463/aaac1b
10.3390/electronics3020234
10.1109/JSEN.2023.3236438
10.1016/j.snb.2017.02.063
10.1109/TED.2022.3224092
10.1109/TED.2008.925339
10.1109/TED.2023.3336301
10.1002/advs.201900813
10.1016/j.orgel.2008.12.001
10.1109/JSEN.2019.2963269
10.1109/TED.2013.2282994
10.1109/5.915374
10.1109/led.2011.2156757
10.1039/C9NR03395E
10.1002/adfm.201606339
10.1109/TED.2009.2033308
10.1021/acs.chemrev.8b00045
10.1109/JFLEX.2024.3400760
10.1016/j.orgel.2019.105485
10.1109/TED.2024.3442165
10.1109/NANO.2015.7388909
10.1109/TED.2022.3147153
10.1109/TED.2023.3255835
10.1109/JSEN.2022.3221997
10.1126/science.268.5208.270
10.1088/1361-6641/ac274f
10.1109/JEDS.2023.3294598
10.1002/adma.202406105
10.1002/adfm.201505019
10.1049/iet-cds.2016.0439
10.1002/advs.202001116
10.1109/TED.2023.3287509
10.1016/j.mssp.2013.08.020
10.1021/jp044318f
10.1016/j.sse.2007.11.007
10.1109/TNANO.2018.2846230
ContentType Journal Article
DBID 97E
RIA
RIE
AAYXX
CITATION
DOI 10.1109/JFLEX.2024.3471489
DatabaseName IEEE All-Society Periodicals Package (ASPP) 2005–Present
IEEE All-Society Periodicals Package (ASPP) 1998–Present
IEEE Electronic Library (IEL)
CrossRef
DatabaseTitle CrossRef
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://proxy.k.utb.cz/login?url=https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
EISSN 2768-167X
EndPage 347
ExternalDocumentID 10_1109_JFLEX_2024_3471489
10701505
Genre orig-research
GrantInformation_xml – fundername: Anusandhan National Research Foundation (ANRF), Government of India
  grantid: SRG/2022/001834
  funderid: 10.13039/501100001415
GroupedDBID 0R~
97E
AASAJ
AAWTH
ABJNI
ABQJQ
ABVLG
AGQYO
AHBIQ
AKJIK
AKQYR
ALMA_UNASSIGNED_HOLDINGS
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
EBS
IFIPE
JAVBF
OCL
RIA
RIE
AAYXX
CITATION
ID FETCH-LOGICAL-c134t-2b8ce2eae07171e6b064ab082b95cf48cc39464b03a9fcd9ce06602656fac7e83
IEDL.DBID RIE
ISSN 2768-167X
IngestDate Tue Jul 01 03:01:03 EDT 2025
Wed Aug 27 03:01:34 EDT 2025
IsPeerReviewed false
IsScholarly true
Issue 7
Language English
License https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html
https://doi.org/10.15223/policy-029
https://doi.org/10.15223/policy-037
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-c134t-2b8ce2eae07171e6b064ab082b95cf48cc39464b03a9fcd9ce06602656fac7e83
ORCID 0009-0009-2557-9710
0000-0002-3786-131X
PageCount 7
ParticipantIDs crossref_primary_10_1109_JFLEX_2024_3471489
ieee_primary_10701505
ProviderPackageCode CITATION
AAYXX
PublicationCentury 2000
PublicationDate 2024-July
PublicationDateYYYYMMDD 2024-07-01
PublicationDate_xml – month: 07
  year: 2024
  text: 2024-July
PublicationDecade 2020
PublicationTitle IEEE journal on flexible electronics
PublicationTitleAbbrev JFLEX
PublicationYear 2024
Publisher IEEE
Publisher_xml – name: IEEE
References ref13
ref35
ref12
ref34
ref15
ref37
ref14
ref36
ref31
ref30
ref11
ref33
ref10
ref32
ref2
ref1
Joe (ref39) 2021; 9
ref17
ref16
ref19
ref18
ref24
ref23
ref26
ref25
ref20
ref22
ref21
ref28
ref27
ref29
ref8
Rajput (ref38) 2021; 7
ref7
ref9
ref4
ref3
ref6
ref5
References_xml – ident: ref19
  doi: 10.1088/1361-6463/aaac1b
– ident: ref17
  doi: 10.3390/electronics3020234
– ident: ref21
  doi: 10.1109/JSEN.2023.3236438
– ident: ref35
  doi: 10.1016/j.snb.2017.02.063
– ident: ref18
  doi: 10.1109/TED.2022.3224092
– ident: ref29
  doi: 10.1109/TED.2008.925339
– ident: ref9
  doi: 10.1109/TED.2023.3336301
– ident: ref6
  doi: 10.1002/advs.201900813
– ident: ref7
  doi: 10.1016/j.orgel.2008.12.001
– volume: 7
  start-page: 26
  issue: 3
  year: 2021
  ident: ref38
  article-title: Half adder using different design styles: A review on comparative study
  publication-title: J. Adv. Robot.
– ident: ref14
  doi: 10.1109/JSEN.2019.2963269
– volume: 9
  start-page: 1
  issue: 2
  year: 2021
  ident: ref39
  article-title: Design of low power high speed hybrid adder
  publication-title: i-manager’s J. Digit. Signal Process.
– ident: ref25
  doi: 10.1109/TED.2013.2282994
– ident: ref11
  doi: 10.1109/5.915374
– ident: ref5
  doi: 10.1109/led.2011.2156757
– ident: ref16
  doi: 10.1039/C9NR03395E
– ident: ref8
  doi: 10.1002/adfm.201606339
– ident: ref23
  doi: 10.1109/TED.2009.2033308
– ident: ref37
  doi: 10.1021/acs.chemrev.8b00045
– ident: ref30
  doi: 10.1109/JFLEX.2024.3400760
– ident: ref12
  doi: 10.1016/j.orgel.2019.105485
– ident: ref31
  doi: 10.1109/TED.2024.3442165
– volume-title: TechModeler: Device Modeling for New Technologies
  ident: ref32
– ident: ref27
  doi: 10.1109/NANO.2015.7388909
– ident: ref20
  doi: 10.1109/TED.2022.3147153
– ident: ref22
  doi: 10.1109/TED.2023.3255835
– ident: ref15
  doi: 10.1109/JSEN.2022.3221997
– ident: ref2
  doi: 10.1126/science.268.5208.270
– ident: ref36
  doi: 10.1088/1361-6641/ac274f
– ident: ref28
  doi: 10.1109/JEDS.2023.3294598
– ident: ref10
  doi: 10.1002/adma.202406105
– ident: ref4
  doi: 10.1002/adfm.201505019
– ident: ref24
  doi: 10.1049/iet-cds.2016.0439
– ident: ref3
  doi: 10.1002/advs.202001116
– ident: ref34
  doi: 10.1109/TED.2023.3287509
– ident: ref1
  doi: 10.1016/j.mssp.2013.08.020
– ident: ref13
  doi: 10.1021/jp044318f
– ident: ref26
  doi: 10.1016/j.sse.2007.11.007
– ident: ref33
  doi: 10.1109/TNANO.2018.2846230
SSID ssj0002961380
Score 2.2672224
Snippet This article discusses the compact modeling of organic thin-film transistors (OTFTs) fabricated on both flexible and silicon substrates. These compact models...
SourceID crossref
ieee
SourceType Index Database
Publisher
StartPage 341
SubjectTerms Circuits
Data models
Dielectrics
Integrated circuit modeling
Inverters
Logic gates
Organic thin film transistors
Organic thin-film transistor (OTFT) on flexible substrate
OTFT on a silicon substrate
Silicon
Silvaco-gateway tool
Silvaco-TechModeler tool
smart-SPICE simulator
Substrates
Transient analysis
Title Comparative Analysis of Compact Modeled of Low-Voltage OTFTs on Flexible and Silicon Substrates for the Implementation of Logic Circuits
URI https://ieeexplore.ieee.org/document/10701505
Volume 3
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV3dS8MwEA9uT_rg58T5RR58k85-pF3zKMMyxjYf3GRvJUkvMJytbB2Cf4F_tpe00yEIvpWQlpC73v3ukvsdITeZy0Fo3-S_ODjGBThCanB8zVyt3RCVxuQ7RuOoP2WDWTiri9VtLQwA2Mtn0DGP9iw_K9TapMrwD--aAD1skAbqWVWs9Z1Q8Tl6ptjdFMa4_G6QDB9mGAL6rBOgDWamlfuW89nqpmKdSXJAxptlVHdIXjrrUnbUxy-Gxn-v85Ds17CS3ld6cER2ID8me1tkgyfks_dD9E03XCS00NSOq5KObFOczAwNi3fnuViUaGzo4ySZ4LycJoY7Uy6AijyjT_MF6lBOjeGxBLcrivCXIpyklnD4ta5pyqvPoX2lvflSreflqkWmycOk13fqPgyO8gJWOr6MFfggwMR-HkQSYYyQiB0kD5VmsVIBZxGTbiC4VhlXgDgGY7sw0kJ1IQ5OSTMvcjgjFETQ9ULldznXTEAgGHieYDFkXqSlCtvkdiOg9K2i20htmOLy1IozNeJMa3G2Scts_tbMat_P_xi_ILvm9eq27SVplss1XCGmKOW11aUvxY3L3g
linkProvider IEEE
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV1LT8MwDI5gHIADb8SbHLihjj7SrjmiiWqMbRwYaLcqSR1pYrRodELiF_CzcdIOJiQkblUURVHs2J_d-DMhF5nLQWjf5L84OMYFOEJqcHzNXK3dEJXG5Dv6g6jzyLqjcFQXq9taGACwj8-gaT7tv_ysUDOTKsMb3jIBerhMVtDxs7Aq1_pOqfgcfVPszktjXH7VTXo3IwwCfdYM0Aoz08x9wf0s9FOx7iTZJIP5RqpXJM_NWSmb6uMXR-O_d7pFNmpgSa8rTdgmS5DvkPUFusFd8tn-ofqmczYSWmhqx1VJ-7YtTmaGesW781RMSjQ39H6YDHFeThPDniknQEWe0YfxBLUop8b0WIrbN4oAmCKgpJZy-KWuasqr5dDC0vZ4qmbj8m2PPCY3w3bHqTsxOMoLWOn4MlbggwAT_XkQSQQyQiJ6kDxUmsVKBZxFTLqB4FplXAEiGYzuwkgL1YI42CeNvMjhgFAQQcsLld_iXDMBgWDgeYLFkHmRlio8JJdzAaWvFeFGagMVl6dWnKkRZ1qL85DsmcNfmFmd-9Ef4-dktTPs99Le7eDumKyZpaq3tyekUU5ncIoIo5RnVq--AJnZzys
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Comparative+Analysis+of+Compact+Modeled+of+Low-Voltage+OTFTs+on+Flexible+and+Silicon+Substrates+for+the+Implementation+of+Logic+Circuits&rft.jtitle=IEEE+journal+on+flexible+electronics&rft.au=Singh+Mehrolia%2C+Mukuljeet&rft.au=Verma%2C+Ankit&rft.au=Kumar+Singh%2C+Abhishek&rft.date=2024-07-01&rft.issn=2768-167X&rft.eissn=2768-167X&rft.volume=3&rft.issue=7&rft.spage=341&rft.epage=347&rft_id=info:doi/10.1109%2FJFLEX.2024.3471489&rft.externalDBID=n%2Fa&rft.externalDocID=10_1109_JFLEX_2024_3471489
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=2768-167X&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=2768-167X&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=2768-167X&client=summon