Verification of parameterized hierarchical state machines using action language verifier

Action language verifier (ALV) is an infinite-state symbolic model checker. ALV can verify (or falsify, by generating counter-examples) temporal logic properties of systems that can be modeled using a combination of Boolean logic and linear arithmetic expressions on Boolean, enumerated and (possibly...

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Published inProceedings of the 2nd ACM/IEEE International Conference on Formal Methods and Models for Co-Design pp. 79 - 88
Main Authors Yavuz-Kahveci, T., Bultan, T.
Format Conference Proceeding
LanguageEnglish
Published Washington, DC, USA IEEE Computer Society 11.07.2005
IEEE
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Abstract Action language verifier (ALV) is an infinite-state symbolic model checker. ALV can verify (or falsify, by generating counter-examples) temporal logic properties of systems that can be modeled using a combination of Boolean logic and linear arithmetic expressions on Boolean, enumerated and (possibly unbounded) integer variables and parameterized integer constants. In this paper, we apply ALV to the verification of parameterized hierarchical state machine specifications. We extend the standard notation for hierarchical state machines by introducing primitives for explicit specification of asynchronous processes and their finite and parameterized instantiations. We define the formal semantics of these primitives, where the states of the parameterized processes are mapped to integer variables using the counting abstraction technique. We apply the presented approach to the specification and analysis of an airport ground traffic controller and verify several correctness properties of this specification using ALV.
AbstractList Action language verifier (ALV) is an infinite-state symbolic model checker. ALV can verify (or falsify, by generating counter-examples) temporal logic properties of systems that can be modeled using a combination of Boolean logic and linear arithmetic expressions on Boolean, enumerated and (possibly unbounded) integer variables and parameterized integer constants. In this paper, we apply ALV to the verification of parameterized hierarchical state machine specifications. We extend the standard notation for hierarchical state machines by introducing primitives for explicit specification of asynchronous processes and their finite and parameterized instantiations. We define the formal semantics of these primitives, where the states of the parameterized processes are mapped to integer variables using the counting abstraction technique. We apply the presented approach to the specification and analysis of an airport ground traffic controller and verify several correctness properties of this specification using ALV.
Author Yavuz-Kahveci, T.
Bultan, T.
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Keywords counting abstraction technique
linear arithmetic expression
temporal logic
ALV
airport ground traffic controller
hierarchical state machines verification
infinite-state symbolic model checker
formal semantics
parameterized integer constants
Boolean logic combination
asynchronous process specification
integer variables
action language verifier
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Snippet Action language verifier (ALV) is an infinite-state symbolic model checker. ALV can verify (or falsify, by generating counter-examples) temporal logic...
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acm
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StartPage 79
SubjectTerms Airports
Arithmetic
Boolean functions
Computer science
Control systems
Data structures
Engines
Libraries
Object oriented modeling
Software and its engineering
Software and its engineering -- Software organization and properties
Software and its engineering -- Software organization and properties -- Software functional properties
Software and its engineering -- Software organization and properties -- Software functional properties -- Formal methods
Software and its engineering -- Software organization and properties -- Software functional properties -- Formal methods -- Model checking
Software systems
Theory of computation
Theory of computation -- Logic
Title Verification of parameterized hierarchical state machines using action language verifier
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