Correlation-guided Placement for Nonvolatile FPGAs
Nonvolatile FPGAs have advantages of high density and near-zero leakage power compared with traditional SRAM-based FPGAs. However, they have lifetime issue. To deal with this problem, a series of configuration files can be generated with various logical-to-physical mappings so that intensive writes...
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Published in | 2023 60th ACM/IEEE Design Automation Conference (DAC) pp. 1 - 6 |
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Main Authors | , , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
09.07.2023
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Subjects | |
Online Access | Get full text |
DOI | 10.1109/DAC56929.2023.10247963 |
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Abstract | Nonvolatile FPGAs have advantages of high density and near-zero leakage power compared with traditional SRAM-based FPGAs. However, they have lifetime issue. To deal with this problem, a series of configuration files can be generated with various logical-to-physical mappings so that intensive writes can be distributed to different physical regions for wear leveling. Currently, the configuration files are independently generated, which is time-consuming. In this paper, we propose to investigate correlations between components and use them to guide the computer-aided design (CAD) flow to speed up the procedure of deriving configuration files. Specifically, we develop dynamic probabilities to drive the swapping of placement step in the CAD flow to push components to locate appropriate positions quickly. Evaluation shows that the proposed schemes can deliver 36.32% reduction in number of swappings when compared with existing strategies, while maintaining comparable performance and lifetime. |
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AbstractList | Nonvolatile FPGAs have advantages of high density and near-zero leakage power compared with traditional SRAM-based FPGAs. However, they have lifetime issue. To deal with this problem, a series of configuration files can be generated with various logical-to-physical mappings so that intensive writes can be distributed to different physical regions for wear leveling. Currently, the configuration files are independently generated, which is time-consuming. In this paper, we propose to investigate correlations between components and use them to guide the computer-aided design (CAD) flow to speed up the procedure of deriving configuration files. Specifically, we develop dynamic probabilities to drive the swapping of placement step in the CAD flow to push components to locate appropriate positions quickly. Evaluation shows that the proposed schemes can deliver 36.32% reduction in number of swappings when compared with existing strategies, while maintaining comparable performance and lifetime. |
Author | Xu, Fanjin Zheng, Huichuan Zhao, Mengying Zhang, Hao Xiong, Yuqing Jia, Zhiping Cai, Xiaojun |
Author_xml | – sequence: 1 givenname: Mengying surname: Zhao fullname: Zhao, Mengying organization: Shandong University,School of Computer Science and Technology,China – sequence: 2 givenname: Fanjin surname: Xu fullname: Xu, Fanjin organization: Shandong University,School of Computer Science and Technology,China – sequence: 3 givenname: Huichuan surname: Zheng fullname: Zheng, Huichuan organization: Shandong University,School of Computer Science and Technology,China – sequence: 4 givenname: Hao surname: Zhang fullname: Zhang, Hao organization: Shandong University,School of Computer Science and Technology,China – sequence: 5 givenname: Yuqing surname: Xiong fullname: Xiong, Yuqing organization: Shandong University,School of Computer Science and Technology,China – sequence: 6 givenname: Zhiping surname: Jia fullname: Jia, Zhiping organization: Shandong University,School of Computer Science and Technology,China – sequence: 7 givenname: Xiaojun surname: Cai fullname: Cai, Xiaojun email: xj_cai@sdu.edu.cn organization: Shandong University,School of Computer Science and Technology,China |
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Snippet | Nonvolatile FPGAs have advantages of high density and near-zero leakage power compared with traditional SRAM-based FPGAs. However, they have lifetime issue. To... |
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SubjectTerms | Correlation Design automation Field programmable gate arrays Simulated annealing |
Title | Correlation-guided Placement for Nonvolatile FPGAs |
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