Fast scalable FPGA-based Network-on-Chip simulation models - Papamichael, M. K. (2011 9th IEEE/ACM International Conference on Formal Methods and Models for Codesign, 2011)
Keywords: Buffer storage; Clocks; Delay; Engines; Field programmable gate arrays; FPGA; Memory management; Network; Network-on-Chip; Simulation; Software; Time-multiplexing; Virtualization