APA (7th ed.) Citation

Alioto, M., & Esseni, D. (2014, September). Performance and impact of process variations in Tunnel-FET ultra-low voltage digital circuits. 2014 27th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6. https://doi.org/10.1145/2660540.2661000

Chicago Style (17th ed.) Citation

Alioto, Massimo, and David Esseni. "Performance and Impact of Process Variations in Tunnel-FET Ultra-low Voltage Digital Circuits." 2014 27th Symposium on Integrated Circuits and Systems Design (SBCCI) Sep. 2014: 1-6. https://doi.org/10.1145/2660540.2661000.

MLA (9th ed.) Citation

Alioto, Massimo, and David Esseni. "Performance and Impact of Process Variations in Tunnel-FET Ultra-low Voltage Digital Circuits." 2014 27th Symposium on Integrated Circuits and Systems Design (SBCCI), Sep. 2014, pp. 1-6, https://doi.org/10.1145/2660540.2661000.