APA (7th ed.) Citation

Sahrling, M. (2022). Layout Techniques for Integrated Circuit Designers (1.). Artech.

Chicago Style (17th ed.) Citation

Sahrling, Mikael. Layout Techniques for Integrated Circuit Designers. 1. Norwood, MA: Artech, 2022.

MLA (9th ed.) Citation

Sahrling, Mikael. Layout Techniques for Integrated Circuit Designers. 1. Artech, 2022.

Warning: These citations may not always be 100% accurate.