A flexible formal verification framework for industrial scale validation

In recent years, leading microprocessor companies have made huge investments to improve the reliability of their products. Besides expanding their validation and CAD tools teams, they have incorporated formal verification methods into their design flows. Formal verification (FV) engineers require ex...

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Bibliographic Details
Published in2011 9th IEEE/ACM International Conference on Formal Methods and Models for Codesign pp. 89 - 97
Main Authors Slobodova, Anna, Davis, Jared, Swords, Sol, Hunt, Warren
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.07.2011
Subjects
Boolean functions
Clocks
Companies
Data structures
Hardware design languages
Integrated circuit modeling
Wires
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ISBN9781457701177
1457701170
DOI10.1109/MEMCOD.2011.5970515

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Summary:In recent years, leading microprocessor companies have made huge investments to improve the reliability of their products. Besides expanding their validation and CAD tools teams, they have incorporated formal verification methods into their design flows. Formal verification (FV) engineers require extensive training, and FV tools from CAD vendors are expensive. At first glance, it may seem that FV teams are not affordable by smaller companies. We have not found this to be true. This paper describes the formal verification framework we have built on top of publicly-available tools. This framework gives us the flexibility to work on myriad different problems that occur in microprocessor design.
ISBN:9781457701177
1457701170
DOI:10.1109/MEMCOD.2011.5970515