Search Results - "Zhengsheng Han" :: K.UTB vyhledávací portál

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STI STRESS EFFECT MODELING METHOD AND DEVICE OF AN MOS DEVICE

by Han Zhengsheng, Bu Jianhui, Li Shuzhen, Luo Jiajun
Year of Publication 08.09.2016

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Chemical Responsive Single Crystal Organic Magnet

by Cui, Yan, Zhu, Huiping, Wang, Lei, Li, Bo, Han, Zhengsheng, Luo, Jiajun
Published in arXiv.org (08.02.2018)

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Method for verifying validity of post-simulation extraction file

by LUO JIAJUN, BU JIANHUI, HAN ZHENGSHENG
Year of Publication 30.12.2015

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Modeling method for SOI-based PN junction

by LUO JIAJUN, BU JIANHUI, ZHAO BOHUA, HAN ZHENGSHENG
Year of Publication 09.12.2015

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Voltage reference circuit, component and equipment

by DING YINAN, LUO JIAJUN, ZHAO WENXIN, ZHAO FAZHAN, LIU HAINAN, HAN ZHENGSHENG
Year of Publication 21.10.2022

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Voltage reference circuit, component and equipment

by DING YINAN, LUO JIAJUN, ZHAO WENXIN, ZHAO FAZHAN, LIU HAINAN, HAN ZHENGSHENG
Year of Publication 21.10.2022

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Reference voltage generation circuit based on PMOS (P-channel Metal Oxide Semiconductor) temperature compensation characteristic and design method and device

by LUO JIAJUN, XU TING, ZHAO WENXIN, ZHAO FAZHAN, LIU HAINAN, HAN ZHENGSHENG
Year of Publication 21.10.2022

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Reference voltage generation circuit based on NMOS (N-channel Metal Oxide Semiconductor) temperature compensation characteristic and design method and device

by LUO JIAJUN, XU TING, ZHAO WENXIN, ZHAO FAZHAN, LIU HAINAN, HAN ZHENGSHENG
Year of Publication 21.10.2022

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MOSVAR (Metal Oxide Semiconductor Varactor) modeling method

by LUO JIAJUN, BU JIANHUI, HAN ZHENGSHENG
Year of Publication 11.11.2015

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Method for limiting suitable temperature range of device model

by LUO JIAJUN, BU JIANHUI, ZHAO BOHUA, HAN ZHENGSHENG
Year of Publication 21.10.2015

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Memory association method and memory

by LUO JIAJUN, ZHAO FAZHAN, HAN ZHENGSHENG
Year of Publication 19.03.2019

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SOIMOSFET device modeling method

by LUO JIAJUN, BU JIANHUI, HAN ZHENGSHENG
Year of Publication 30.09.2015

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Bipolar transistor and preparation method thereof

by XIAOWU CAI, WANG SHIH-PING, JIN MEICHEN, ZHAO FAZHAN, LI DUOLI, LI XIAOJING, HAN ZHENGSHENG
Year of Publication 09.06.2023

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Bipolar transistor and preparation method thereof

by XIAOWU CAI, WANG SHIH-PING, JIN MEICHEN, ZHAO FAZHAN, LI DUOLI, LI XIAOJING, HAN ZHENGSHENG
Year of Publication 09.06.2023

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Bipolar transistor and preparation method thereof

by XIAOWU CAI, WANG SHIH-PING, JIN MEICHEN, ZHAO FAZHAN, LI DUOLI, LI XIAOJING, HAN ZHENGSHENG
Year of Publication 09.06.2023

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SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

by LUO JIAJUN, BI JINSHUN, HAN ZHENGSHENG
Year of Publication 18.06.2015

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Code circuit designing method for (15, 5) BCH (Bose, Chaudhuri and Hocquenghem) code

by LIU XIN, ZHAO FAZHAN, LIU MENGXIN, HAN ZHENGSHENG
Year of Publication 08.04.2015

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Multichannel SRAM single-event test method and device

by LUO JIAJUN, LIU GANG, ZHAO FAZHAN, LIU QIANRU, HAN ZHENGSHENG
Year of Publication 08.04.2015

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Multimode SRAM single-particle testing method and device

by LUO JIAJUN, LIU GANG, ZHAO FAZHAN, LIU QIANRU, HAN ZHENGSHENG
Year of Publication 01.04.2015

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Ten-transistor transient effect resisting SRAM unit

by LIU XIN, ZHAO FAZHAN, LIU MENGXIN, HAN ZHENGSHENG
Year of Publication 25.03.2015

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