A 16nm 256-bit wide 89.6GByte/s total bandwidth in-package interconnect with 0.3V swing and 0.062pJ/bit power in InFO package
Mu-Shan Lin, Chien-Chun Tsai, Cheng-Hsiang Hsieh, Wen-Hung Huang, Yu-Chi Chen, Shu-Chun Yang, Chin-Ming Fu, Hao-Jie Zhan, Jinn-Yeh Chien, Shao-Yu Li, Chen, Y.-H, Kuo, C.-C, Shih-Peng Tai, Yamada, Kazuyoshi
Published in 2016 IEEE Hot Chips 28 Symposium (HCS) (01.08.2016)
Published in 2016 IEEE Hot Chips 28 Symposium (HCS) (01.08.2016)
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