Automatic delay correction method for IP block-based design of VLSI dedicated digital signal processing systems: theoretical foundations and implementation
Zergainoh, N.-E., Tambour, L., Jerraya, A.A.
Published in IEEE transactions on very large scale integration (VLSI) systems (01.04.2006)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.04.2006)
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Journal Article
A fault-tolerant deadlock-free adaptive routing for on chip interconnects
Chaix, F, Avresky, D, Zergainoh, N-E, Nicolaidis, M
Published in 2011 Design, Automation & Test in Europe (01.03.2011)
Published in 2011 Design, Automation & Test in Europe (01.03.2011)
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Conference Proceeding
Design space exploration for hardware/software codesign of multiprocessor systems
Baghdadi, A., Zergainoh, N., Cesario, W., Roudier, T., Jerraya, A.A.
Published in Proceedings 11th International Workshop on Rapid System Prototyping. RSP 2000. Shortening the Path from Specification to Prototype (Cat. No.PR00668) (2000)
Published in Proceedings 11th International Workshop on Rapid System Prototyping. RSP 2000. Shortening the Path from Specification to Prototype (Cat. No.PR00668) (2000)
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Conference Proceeding
Eliminating speed penalty in ECC protected memories
Nicolaidis, M, Bonnoit, T, Zergainoh, N-E
Published in 2011 Design, Automation & Test in Europe (01.03.2011)
Published in 2011 Design, Automation & Test in Europe (01.03.2011)
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Conference Proceeding
Design for test and reliability in ultimate CMOS
Nicolaidis, M., Anghel, L., Zergainoh, N-E, Zorian, Y., Karnik, T., Bowman, K., Tschanz, J., Shih-Lien Lu, Tokunaga, C., Raychowdhury, A., Khellah, M., Kulkarni, J., De, V., Avresky, D.
Published in 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.03.2012)
Published in 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.03.2012)
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Conference Proceeding
Hw/Sw codesign of an ATM network interface card starting from a system level specification
Zergainoh, N.-E., Marchioro, G.F., Jerraya, A.A.
Published in 1998 URSI International Symposium on Signals, Systems, and Electronics. Conference Proceedings (Cat. No.98EX167) (1998)
Published in 1998 URSI International Symposium on Signals, Systems, and Electronics. Conference Proceedings (Cat. No.98EX167) (1998)
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Conference Proceeding
Low Runtime-Overhead Software Synthesis for Communicating Concurrent Processes
Youngchul Cho, Zergainoh, N.-E., Kiyoung Choi, Jerraya, A.A.
Published in 18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP '07) (01.05.2007)
Published in 18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP '07) (01.05.2007)
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Conference Proceeding
Efficient Fault Detection Architecture Design of Latch-Based Low Power DSP/MCU Processor
Hai Yu, Nicolaidis, M., Anghel, L., Zergainoh, N.-E
Published in 2011 Sixteenth IEEE European Test Symposium (01.05.2011)
Published in 2011 Sixteenth IEEE European Test Symposium (01.05.2011)
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Conference Proceeding
Automatic Code Generation for MPSoC Platform Starting From Simulink/Matlab : New Approach to Bridge the Gap between Algorithm and Architecture Design
Atat, Y., Zergainoh, N.-E.
Published in 2008 3rd International Conference on Information and Communication Technologies: From Theory to Applications (01.04.2008)
Published in 2008 3rd International Conference on Information and Communication Technologies: From Theory to Applications (01.04.2008)
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Conference Proceeding
Simulink-based MPSoC Design: New Approach to Bridge the Gap between Algorithm and Architecture Design
Atat, Y., Zergainoh, N.-E.
Published in IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07) (01.03.2007)
Published in IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07) (01.03.2007)
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Conference Proceeding
IP-block-based design environment for high-throughput VLSI dedicated digital signal processing systems
Zergainoh, N.-E., Popovici, K., Jerraya, A., Urard, P.
Published in Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005 (2005)
Published in Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005 (2005)
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Conference Proceeding
Variability and reliability-aware application tasks scheduling and power control (Voltage and Frequency Scaling) in the future nanoscale multiprocessors system on chip
Bizot, G., Zergainoh, N.-E., Nicolaidis, N.
Published in 2009 15th IEEE International On-Line Testing Symposium (01.06.2009)
Published in 2009 15th IEEE International On-Line Testing Symposium (01.06.2009)
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Conference Proceeding