A Study of 3-D Power Delivery Networks With Multiple Clock Domains
Todri-Sanial, Aida, Cheng, Yuanqing
Published in IEEE transactions on very large scale integration (VLSI) systems (01.11.2016)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.11.2016)
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Journal Article
Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation-Part I: CNFET Transistor Optimization
Chen, Rongmei, Chen, Lin, Liang, Jie, Cheng, Yuanqing, Elloumi, Souhir, Lee, Jaehyun, Xu, Kangwei, Georgiev, Vihar P., Ni, Kai, Debacker, Peter, Asenov, Asen, Todri-Sanial, Aida
Published in IEEE transactions on very large scale integration (VLSI) systems (01.04.2022)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.04.2022)
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Journal Article
Design space exploration for balanced MLC-PCM programming
Ren, Jierui, Luo, Xinwei, Cheng, Yuanqing, Guo, Xiaochen
Published in Memories - Materials, Devices, Circuits and Systems (01.12.2022)
Published in Memories - Materials, Devices, Circuits and Systems (01.12.2022)
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Journal Article
Alleviating Through-Silicon-Via Electromigration for 3-D Integrated Circuits Taking Advantage of Self-Healing Effect
Cheng, Yuanqing, Todri-Sanial, Aida, Yang, Jianlei, Zhao, Weisheng
Published in IEEE transactions on very large scale integration (VLSI) systems (01.11.2016)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.11.2016)
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Journal Article
PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM
Wang, Ying, Han, Yinhe, Li, Huawei, Zhang, Lei, Cheng, Yuanqing, Li, Xiaowei
Published in IEEE transactions on very large scale integration (VLSI) systems (01.05.2016)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.05.2016)
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Journal Article
ODESY: A novel 3T-3MTJ cell design with optimized area density, scalability and latency
Linuo Xue, Yuanqing Cheng, Jianlei Yang, Peiyuan Wang, Yuan Xie
Published in 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) (01.11.2016)
Published in 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) (01.11.2016)
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Conference Proceeding
NEAR: A Novel Energy Aware Replacement Policy for STT-MRAM LLCs
Chen Liu, Yuanqing Cheng, Ying Wang, Youguang Zhang, Weisheng Zhao
Published in 2018 IEEE International Symposium on Circuits and Systems (ISCAS) (27.05.2018)
Published in 2018 IEEE International Symposium on Circuits and Systems (ISCAS) (27.05.2018)
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Conference Proceeding
A body-biasing of readout circuit for STT-RAM with improved thermal reliability
Lun Yang, Yuanqing Cheng, Yuhao Wang, Hao Yu, Weisheng Zhao, Todri-Sanial, Aida
Published in 2015 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2015)
Published in 2015 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2015)
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Conference Proceeding
Wrapper Chain Design for Testing TSVs Minimization in Circuit-Partitioned 3D SoC
Yuanqing Cheng, Lei Zhang, Yinhe Han, Jun Liu, Xiaowei Li
Published in 2011 Asian Test Symposium (01.11.2011)
Published in 2011 Asian Test Symposium (01.11.2011)
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Conference Proceeding
A Survey of Test and Reliability Solutions for Magnetic Random Access Memories
Girard, Patrick, Cheng, Yuanqing, Virazel, Arnaud, Zhao, Weisheng, Bishnoi, Rajendra, Tahoori, Mehdi B.
Published in Proceedings of the IEEE (01.02.2021)
Published in Proceedings of the IEEE (01.02.2021)
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Journal Article
Architecture design with STT-RAM: Opportunities and challenges
Ping Chi, Shuangchen Li, Yuanqing Cheng, Yu Lu, Kang, Seung H., Yuan Xie
Published in 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC) (01.01.2016)
Published in 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC) (01.01.2016)
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Conference Proceeding
Journal Article
PDG: A Prefetcher for Dynamic Graph Updating
Zhang, Xinmiao, Liu, Cheng, Ni, Jiacheng, Cheng, Yuanqing, Zhang, Lei, Li, Huawei, Li, Xiaowei
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.04.2024)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.04.2024)
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Journal Article
Building energy-efficient multi-level cell STT-RAM caches with data compression
Liu Liu, Ping Chi, Shuangchen Li, Yuanqing Cheng, Yuan Xie
Published in 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC) (01.01.2017)
Published in 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC) (01.01.2017)
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Conference Proceeding
Emerging monolithic 3D integration: Opportunities and challenges from the computer system perspective
Cheng, Yuanqing, Guo, Xiaochen, Pavlidis, Vasilis F.
Published in Integration (Amsterdam) (01.07.2022)
Published in Integration (Amsterdam) (01.07.2022)
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Journal Article
Multicorner Timing Analysis Acceleration for Iterative Physical Design of ICs
Xing, Wei W., Wang, Longze, Wang, Zhelong, Shi, Zhaoyu, Xu, Ning, Cheng, Yuanqing, Zhao, Weisheng
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.07.2024)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.07.2024)
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Journal Article
Temperature Impact Analysis and Access Reliability Enhancement for 1T1MTJ STT-RAM
Wu, Bi, Cheng, Yuanqing, Yang, Jianlei, Todri-Sanial, Aida, Zhao, Weisheng
Published in IEEE transactions on reliability (01.12.2016)
Published in IEEE transactions on reliability (01.12.2016)
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Journal Article
A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration
Wu, Bi, Dai, Pengcheng, Cheng, Yuanqing, Wang, Ying, Yang, Jianlei, Wang, Zhaohao, Liu, Dijun, Zhao, Weisheng
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.04.2020)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.04.2020)
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Journal Article