A Fully-Integrated 40-Gb/s Transceiver in 65-nm CMOS Technology
CHEN, Ming-Shuan, SHIH, Yu-Nan, LIN, Chen-Lun, HUNG, Hao-Wei, LEE, Jri
Published in IEEE journal of solid-state circuits (01.03.2012)
Published in IEEE journal of solid-state circuits (01.03.2012)
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Journal Article
A 40Gb/s TX and RX chip set in 65nm CMOS
Ming-Shuan Chen, Yu-Nan Shih, Chen-Lun Lin, Hao-Wei Hung, Jri Lee
Published in 2011 IEEE International Solid-State Circuits Conference (01.02.2011)
Published in 2011 IEEE International Solid-State Circuits Conference (01.02.2011)
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Conference Proceeding
A 56Gb/s PAM-4 Receiver with Voltage Pre-Shift CTLE and 10-Tap DFE of Tap-1 Speculation in 7nm FinFET
Chen, Wei-Chih, Yang, Shu-Chun, Shih, Yu-Nan, Huang, Wen-Hung, Tsai, Chien-Chun, Hsieh, Kenny Cheng-Hsiang
Published in 2019 Symposium on VLSI Circuits (01.06.2019)
Published in 2019 Symposium on VLSI Circuits (01.06.2019)
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Conference Proceeding