A two-stage weighted capacitor network for D/A-A/D conversion
Yee, Y.S., Terman, L.M., Heller, L.G.
Published in IEEE journal of solid-state circuits (01.08.1979)
Published in IEEE journal of solid-state circuits (01.08.1979)
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Journal Article
A 1 mV MOS comparator
Yee, Y.S., Terman, L.M., Heller, L.G.
Published in IEEE journal of solid-state circuits (01.06.1978)
Published in IEEE journal of solid-state circuits (01.06.1978)
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Journal Article
CCD memory using multilevel storage
Terman, L.M., Yee, Y.S., Merrill, R.B., Heller, L.G., Pettigrew, M.B.
Published in IEEE journal of solid-state circuits (01.10.1981)
Published in IEEE journal of solid-state circuits (01.10.1981)
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Journal Article