A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes
Meng-Fan Chang, Shyh-Shyuan Sheu, Ku-Feng Lin, Che-Wei Wu, Chia-Chen Kuo, Pi-Feng Chiu, Yih-Shan Yang, Yu-Sheng Chen, Heng-Yuan Lee, Chen-Hsin Lien, Chen, F. T., Keng-Li Su, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai
Published in IEEE journal of solid-state circuits (01.03.2013)
Published in IEEE journal of solid-state circuits (01.03.2013)
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Journal Article
Layer-Aware Program-and-Read Schemes for 3D Stackable Vertical-Gate BE-SONOS NAND Flash Against Cross-Layer Process Variations
Hung, Chun-Hsiung, Chang, Meng-Fan, Yang, Yih-Shan, Kuo, Yao-Jen, Lai, Tzu-Neng, Shen, Shin-Jang, Hsu, Jo-Yu, Hung, Shuo-Nan, Lue, Hang-Ting, Shih, Yen-Hao, Huang, Shih-Lin, Chen, Ti-Wen, Chen, Tzung Shen, Chen, Chung Kuang, Hung, Chi-Yu, Lu, Chih-Yuan
Published in IEEE journal of solid-state circuits (01.06.2015)
Published in IEEE journal of solid-state circuits (01.06.2015)
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Journal Article
A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability
Shyh-Shyuan Sheu, Meng-Fan Chang, Ku-Feng Lin, Che-Wei Wu, Yu-Sheng Chen, Pi-Feng Chiu, Chia-Chen Kuo, Yih-Shan Yang, Pei-Chia Chiang, Wen-Pin Lin, Che-He Lin, Heng-Yuan Lee, Pei-Yi Gu, Sum-Min Wang, Chen, F T, Keng-Li Su, Chen-Hsin Lien, Kuo-Hsing Cheng, Hsin-Tun Wu, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai
Published in 2011 IEEE International Solid-State Circuits Conference (01.02.2011)
Published in 2011 IEEE International Solid-State Circuits Conference (01.02.2011)
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Conference Proceeding
A sub-0.5V charge pump circuit for resistive RAM (ReRAM) enabled low supply voltage nonvolatile logics and nonvoaltile processors
Meng-Fan Chang, Shin-Jang Shen, Yi-Lun Lu, Yih-Shan Yang, Jui-Yu Hung, Che-Wei Wu, Yan-Bing Jhang, Wei-how Chen, Han-Wen Hu
Published in 2016 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) (01.08.2016)
Published in 2016 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) (01.08.2016)
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Conference Proceeding
3D stackable vertical-gate BE-SONOS NAND flash with layer-aware program-and-read schemes and wave-propagation fail-bit-detection against cross-layer process variations
Chun-Hsiung Hung, Yih-Shan Yang, Yao-Jen Kuo, Tzu-Neng Lai, Shin-Jang Shen, Jo-Yu Hsu, Shuo-Nan Hung, Hang-Ting Lue, Meng-Fan Chang, Yen-Hao Shih, Shih-Lin Huang, Ti-Wen Chen, Tzung Shen Chen, Chung Kuang Chen, Chi-Yu Hung, Chih-Yuan Lu
Published in 2013 Symposium on VLSI Technology (01.06.2013)
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Published in 2013 Symposium on VLSI Technology (01.06.2013)
Conference Proceeding