A 2.0Gb/s clock-embedded interface for full-HD 10b 120Hz LCD drivers with 1/5-rate noise-tolerant phase and frequency recovery
Yamguchi, K., Hori, Y., Nakajima, K., Suzuki, K., Mizuno, M., Hayama, H.
Published in 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2009)
Published in 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2009)
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Conference Proceeding
2.5 GHz 4-phase clock generator with scalable and no feedback loop architecture
Yamguchi, K., Fukaishi, M., Sakamoto, T., Akiyama, N., Nakamura, K.
Published in 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177) (2001)
Published in 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177) (2001)
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Conference Proceeding
INHIBITION OF AVIAN MYELOBLASTOSIS VIRUS REVERSE TRANSCRIPTASE BY FLAVONES AND ISOFLAVONES
INOUYE, YOSHIO, YAMAGUCHI, KENJI, TAKE, YUKINORI, NAKAMURA, SHOSHIRO
Published in Journal of antibiotics (01.10.1989)
Published in Journal of antibiotics (01.10.1989)
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Journal Article