Hole trap effect on time-dependent-dielectric breakdown (TDDB) of high-voltage peripheral nMOSFETs in flash memory application
Guangfan Jiao, Sungkweon Baek, Kab-jin Nam, Sung-Il Chang, Siyeon Cho, Kauerauf, Thomas, Chanho Lee, Seung-Uk Han, Jin-Soak Kim, Eun-Ae Chung, Yoo-Cheol Shin, Junhee Lim, Yu-Gyun Shin, Kihyun Hwang
Published in 2017 IEEE International Reliability Physics Symposium (IRPS) (01.04.2017)
Published in 2017 IEEE International Reliability Physics Symposium (IRPS) (01.04.2017)
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Conference Proceeding
Spatial Distribution of Interface Traps in Sub-50-nm Recess-Channel-Type DRAM Cell Transistors
CHUNG, Eun-Ae, KIM, Young-Pil, MOON, Joo-Tae, KIM, Sangsig, PARK, Min-Chul, NAM, Kab-Jin, LEE, Sung-Sam, MIN, Ji-Young, YANG, Giyoung, SHIN, Yu-Gyun, CHOI, Siyoung, JIN, Gyoyoung
Published in IEEE electron device letters (01.01.2011)
Published in IEEE electron device letters (01.01.2011)
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Journal Article
3-STAR: A Super-steep switching, Stackable, and Strongly Reliable Transistor Array RAM for Sub-10nm DRAM and beyond
Lee, Kynghwan, Yoo, Sungwon, Hong, Jaeho, Kim, Hyun-Cheol, Kim, YongSeok, Kim, Ilgweon, Ha, Daewon, Shin, Yu-Gyun, Song, Jaihyuk
Published in 2023 International Electron Devices Meeting (IEDM) (09.12.2023)
Published in 2023 International Electron Devices Meeting (IEDM) (09.12.2023)
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Improvement of GIDL-assisted Erase by using Surrounded BL PAD Structure for VNAND
Lim, Suhwan, Kim, Samki, Lee, Changhee, Choi, Hyeongwon, Kim, Nambin, Jung, Jaehun, Yang, Hanvit, Kim, Tae-Hun, Lim, Junhee, Ha, Daewon, Hur, Sunghoi, Jang, Jaehoon, Shin, Yu-Gyun, Song, Jaihyuk
Published in 2023 IEEE International Memory Workshop (IMW) (01.05.2023)
Published in 2023 IEEE International Memory Workshop (IMW) (01.05.2023)
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Evolution of NAND Flash Memory: From 2D to 3D as a Storage Market Leader
Hyunsuk Kim, Su-Jin Ahn, Yu Gyun Shin, Kyupil Lee, Eunseung Jung
Published in 2017 IEEE International Memory Workshop (IMW) (01.05.2017)
Published in 2017 IEEE International Memory Workshop (IMW) (01.05.2017)
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Conference Proceeding
Leakage current mechanisms in sub-50 nm recess-channel-type DRAM cell transistors with three-terminal gate-controlled diodes
CHUNG, Eun-Ae, KIM, Young-Pil, NAM, Kab-Jin, LEE, Sungsam, MIN, Ji-Young, SHIN, Yu-Gyun, CHOI, Siyoung, JIN, Gyoyoung, MOON, Joo-Tae, KIM, Sangsig
Published in Solid-state electronics (01.02.2011)
Published in Solid-state electronics (01.02.2011)
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Journal Article
Investigation of spatial and energetic trap distributions in 1 nm EOT SiO2/HfO2 by discharging-sweep mode amplitude charge pumping
CHUNG, Eun-Ae, NAM, Kab-Jin, KIM, Sangsig, KIM, Young-Pil, MIN, Ji-Young, CHO, Moonju, HONG, Hyungseok, HAN, Jeong, LEE, Jae-Duk, SHIN, Yu-Gyun, CHOI, Siyoung
Published in Solid state sciences (01.06.2011)
Published in Solid state sciences (01.06.2011)
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Journal Article
A new ruler on the storage market: 3D-NAND flash for high-density memory and its technology evolutions and challenges on the future
Jaeduk Lee, Jaehoon Jang, Junhee Lim, Yu Gyun Shin, Kyupil Lee, Eunseung Jung
Published in 2016 IEEE International Electron Devices Meeting (IEDM) (01.12.2016)
Published in 2016 IEEE International Electron Devices Meeting (IEDM) (01.12.2016)
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Conference Proceeding
Gate oxide effect on wafer level reliability of next generation dram transistors
Yu Gyun Shin, Kab-Jin Nam, Heedon Hwang, Jeong Hee Han, Sangjin Hyun, Siyoung Choi, Joo-Tae Moon
Published in 2010 IEEE International Reliability Physics Symposium (01.05.2010)
Published in 2010 IEEE International Reliability Physics Symposium (01.05.2010)
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Conference Proceeding
Effects of Post-Deposition Annealing on the Electrical Properties of HfSiO Films Grown by Atomic Layer Deposition
Cho, Hag-Ju, Lee, Hye Lan, Park, Hong Bae, Jeon, Taek Soo, Park, Seong Geon, Jin, Beom Jun, Kang, Sang Bom, Shin, Yu Gyun, Chung, U-In, Moon, Joo Tae
Published in Japanese Journal of Applied Physics (01.04.2005)
Published in Japanese Journal of Applied Physics (01.04.2005)
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Journal Article
Improved Cell Performance for sub-50 nm DRAM with Manufacturable Bulk FinFET Structure
Deok-Hyung Lee, Sun-Ghil Lee, Jong Ryeol Yoo, Gyoung-Ho Buh, Guk Hyon Yon, Dong-Woon Shin, Dong Kyu Lee, Hyun-Sook Byun, In Soo Jung, Tai-su Park, Yu Gyun Shin, Siyoung Choi, U-In Chung, Joo-Tae Moon, Byung-Il Ryu
Published in 2007 IEEE Symposium on VLSI Technology (01.06.2007)
Published in 2007 IEEE Symposium on VLSI Technology (01.06.2007)
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Easily manufacturable shallow trench isolation for gigabit dynamic random access memory
Roh, Byung Hyug, Cho, Yun Hee, Shin, Yu Gyun, Hong, Chang Gi, Gwun, Sang Dong, Lee, Kang Yun, Kang, Ho Gyu, Ki Nam Kim, Ki Nam Kim, Jong Woo Park, Jong Woo Park
Published in Japanese Journal of Applied Physics (01.09.1996)
Published in Japanese Journal of Applied Physics (01.09.1996)
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High performance device utilizing ultra-thick-strained-Si (UTSS) grown on relaxed SiGe
Sun-Ghil Lee, Young-Pil Kim, Young-Eun Lee, Jong-Wook Lee, Insoo Jung, Deok-Hyung Lee, Yong-Hoon Son, Sung-Kwan Kang, Pilkyu Kang, Min-Gu Kang, Yu Gyun Shin, U-In Chung, Joo Tae Moon
Published in Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005 (2005)
Published in Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005 (2005)
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Effects of plasma nitridation on the electrical properties of nitrided oxide gate dielectric for DRAM application
Jin-Hwa Heo, Dong-Chan Kim, Bon-Young Koo, Ji-Hyun Kim, Chul-Sung Kim, Young-Jin Noh, Sung-Kweon Baek, Yu-Gyun Shin, U-In Chung, Joo-Tae Moon, Mann-Ho Cho, Kwun-Bum Chung, Dae-Won Moon
Published in Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005 (2005)
Published in Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005 (2005)
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Conference Proceeding
Elimination of surface state induced edge transistors in high voltage NMOSFETs for flash memory devices
Lee, Jin-Wook, Buh, Gyoung Ho, Yon, Guk-Hyon, Park, Tai-su, Shin, Yu Gyun, Chung, U-In, Moon, Joo-Tae
Published in Microelectronics and reliability (01.09.2005)
Published in Microelectronics and reliability (01.09.2005)
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Highly Manufacturable 7th Generation 3D NAND Flash Memory with COP structure and Double Stack Process
Kim, Jun Hyoung, Yim, Yongsik, Lim, Joonsung, Kim, Hyun Suk, Suk Cho, Eun, Yeo, Chadong, Lee, Woongseop, You, Byungkwan, Lee, Byoungil, Kang, Minkyu, Jang, Woojae, Kwon, Youngho, Lee, Keehong, Lee, Jaeduk, Kim, Myeong-Cheol, Lee, Jin-Yub, Hur, Sunghoi, Ahn, Su Jin, Hong, Hyeongsun, Shin, Yu Gyun, Kim, Hyoung-Sub, Song, Jaihyuk
Published in 2021 Symposium on VLSI Technology (13.06.2021)
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Published in 2021 Symposium on VLSI Technology (13.06.2021)
Conference Proceeding
Failure analysis on the standby current due to dislocation in STI structure of flash memory
Sang In Kim, Hyung Mo Yang, Hee Seong Yang, Ju Hyeon Ahn, Seok Sik Kim, Yu Gyun Shin, Ki Hyun Hwang, Ji Woon Rim, Woon Kyung Lee, Han Soo Kim, Sun Kyu Whang, Ji Woong Sue, Han Ku Cho
Published in 2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (01.07.2012)
Published in 2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (01.07.2012)
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