Using in-line film measurement as a proxy for device matching to speed up process change qualification
Chienfan Yu, Van Roijen, Raymond, Shah, Shailesh, Woodard, Eric, Ayala, Javier, Sziklas, Edward
Published in 25th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2014) (01.05.2014)
Published in 25th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2014) (01.05.2014)
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Conference Proceeding
Reducing Environmentally Induced Defects While Maintaining Productivity
van Roijen, R., Conti, S. G., Keyser, R., Arndt, R., Burda, R., Ayala, J., Henry, R. O., Levy, J., Maxson, J., Meyette, E., Steer, W., Tabakman, K., Chienfan Yu
Published in IEEE transactions on semiconductor manufacturing (01.02.2013)
Published in IEEE transactions on semiconductor manufacturing (01.02.2013)
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Journal Article
Conference Proceeding
Damage-Free Cryogenic Aerosol Clean Processes
Hong Lin, Chioujones, K., Freebern, T., Chienfan Yu, Lauerhaas, J.
Published in The 17th Annual SEMI/IEEE ASMC 2006 Conference (2006)
Published in The 17th Annual SEMI/IEEE ASMC 2006 Conference (2006)
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Conference Proceeding
Challenges in 65nm Poly, RX and STI Defect Learning
Chienfan Yu, Ayala, J., Cung Tran, Gay, J., Santiago, A., Meyette, E., Hampton, E., Oakley, G., Bandy, K., McCormack, T., Venigalla, R., Scholl, F.
Published in 2008 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (01.05.2008)
Published in 2008 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (01.05.2008)
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Conference Proceeding
Post Implant Strip Optimization for 90nm and Beyond Technologies
Fuller, N.C.M., Santiago, A., Mello, K., Chienfan Yu, Molis, S.
Published in The 17th Annual SEMI/IEEE ASMC 2006 Conference (2006)
Published in The 17th Annual SEMI/IEEE ASMC 2006 Conference (2006)
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Conference Proceeding
Formation and Reduction of Embedded Contamination Defects Detected after FEOL Poly Patterning
Chienfan Yu, Arndt, R., Ronsheim, P., St Lawrence, M., Hong Lin, Zaitz, M., Colwill, B., Bruley, J., Crispo, G.
Published in The 17th Annual SEMI/IEEE ASMC 2006 Conference (2006)
Published in The 17th Annual SEMI/IEEE ASMC 2006 Conference (2006)
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Conference Proceeding
Patterning challenges for monolithic silicon photonics: AP/DFM: Advanced patterning / design for manufacturability
Meagher, Colleen, Sowinski, Zoey, Yu, Chienfan, Hu, Shuren, Nummy, Karen, Ghosal, Mini Modh, Viswanathan, Ramya, Abdo, Amr, Wiltshire, Tim
Published in 2018 29th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) (01.04.2018)
Published in 2018 29th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) (01.04.2018)
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Conference Proceeding
Process queue time control, reactive or proactive?
Yu, Chienfan, Bauman, Laura, Jophlin-Gut, Vickie, Oakley, Garrett, Carbonnell, Michael, Sowinski, Zoey, Sherwood, Edward, Hawkins, Katherine, Kelly, Ryan, Sheraw, Rebekah
Published in 2018 29th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) (01.04.2018)
Published in 2018 29th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) (01.04.2018)
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Conference Proceeding
Damage-Free Cryogenic Aerosol Clean Processes
Hong Lin, Chioujones, K., Lauerhaas, J., Freebern, T., Yu, C.
Published in IEEE transactions on semiconductor manufacturing (01.05.2007)
Published in IEEE transactions on semiconductor manufacturing (01.05.2007)
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Journal Article
Method to controllably form notched polysilicon gate structures
Brown, Jeffrey, Wise, Richard, Yan, Hongwen, Yang, Qingyun, Yu, Chienfan
Year of Publication 01.04.2003
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Year of Publication 01.04.2003
Patent
METHOD TO CONTROLLABLY FORM NOTCHED POLYSILICON GATE STRUCTURES
Brown, Jeffery, Wise, Richard, Yan, Hongwen, Yang, Qingyun, Yu, Chienfan
Year of Publication 13.02.2003
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Year of Publication 13.02.2003
Patent
DUAL LAYER HARD MASK FOR EDRAM GATE ETCH PROCESS
Dobuzinsky, David, Khan, Babar, Liu, Joyce, Wensley, Paul, Yu, Chienfan
Year of Publication 13.02.2003
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Year of Publication 13.02.2003
Patent
Reduced cap layer erosion for borderless contacts
Faltermeier, Johnathan, Stephens, Jeremy, Dobuzinsky, David, Clevenger, Larry, Naeem, Munir D, Yu, Chienfan, Nesbit, Larry, Divakaruni, Rama, Maldei, Michael
Year of Publication 10.05.2005
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Year of Publication 10.05.2005
Patent
Dual layer hard mask for eDRAM gate etch process
Dobuzinsky, David Mark, Khan, Babar Ali, Liu, Joyce C, Wensley, Paul R, Yu, Chienfan
Year of Publication 11.02.2003
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Year of Publication 11.02.2003
Patent
Method of reducing erosion of a nitride gate cap layer during reactive ion etch of nitride liner layer for bit line contact of DRAM device
Dev, Prakash, Maldei, Michael, Dobuzinsky, David, Faltermeier, Johnathan, Rupp, Thomas, Yu, Chienfan, Rengarajan, Rajesh, Benedict, John, Naeem, Munir-ud-Din
Year of Publication 07.10.2004
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Year of Publication 07.10.2004
Patent