Impacts of Poly-Si Nanowire Shape on Gate-All-Around Flash Memory With Hybrid Trap Layer
CHEN, Hung-Bin, WU, Yung-Chun, YANG, Chao-Kan, CHEN, Lun-Chun, CHIANG, Ji-Hong, CHANG, Chun-Yen
Published in IEEE electron device letters (01.10.2011)
Published in IEEE electron device letters (01.10.2011)
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Journal Article
Amorphous silicon charge storage layer of nonvolatile memory with trigate nanowires structure
Hung-Bin Chen, Yung-Chun Wu, Lun-Jyun Chen, Ji-Hong Chiang, Min-Feng Hung, Chao-Kan Yang, Chun-Yen Chang
Published in The 4th IEEE International NanoElectronics Conference (01.06.2011)
Published in The 4th IEEE International NanoElectronics Conference (01.06.2011)
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Conference Proceeding