A 14-bit 250 MS/s IF Sampling Pipelined ADC in 180 nm CMOS Process
Zheng, Xuqiang, Wang, Zhijun, Li, Fule, Zhao, Feng, Yue, Shigang, Zhang, Chun, Wang, Zhihua
Published in IEEE transactions on circuits and systems. I, Regular papers (01.09.2016)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.09.2016)
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Journal Article
A 40-Gb/s Quarter-Rate SerDes Transmitter and Receiver Chipset in 65-nm CMOS
Zheng, Xuqiang, Zhang, Chun, Lv, Fangxu, Zhao, Feng, Yuan, Shuai, Yue, Shigang, Wang, Ziqiang, Li, Fule, Wang, Zhihua, Jiang, Hanjun
Published in IEEE journal of solid-state circuits (01.11.2017)
Published in IEEE journal of solid-state circuits (01.11.2017)
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Journal Article
A 70 mW 25 Gb/s Quarter-Rate SerDes Transmitter and Receiver Chipset With 40 dB of Equalization in 65 nm CMOS Technology
Yuan, Shuai, Wu, Liji, Wang, Ziqiang, Zheng, Xuqiang, Zhang, Chun, Wang, Zhihua
Published in IEEE transactions on circuits and systems. I, Regular papers (01.07.2016)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.07.2016)
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Journal Article
A 80 mW 40 Gb/s Transmitter With Automatic Serializing Time Window Search and 2-tap Pre-Emphasis in 65 nm CMOS Technology
Huang, Ke, Wang, Ziqiang, Zheng, Xuqiang, Zhang, Chun, Wang, Zhihua
Published in IEEE transactions on circuits and systems. I, Regular papers (01.05.2015)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.05.2015)
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Journal Article
Co-packaged optics (CPO): status, challenges, and solutions
Tan, Min, Xu, Jiang, Liu, Siyang, Feng, Junbo, Zhang, Hua, Yao, Chaonan, Chen, Shixi, Guo, Hangyu, Han, Gengshi, Wen, Zhanhao, Chen, Bao, He, Yu, Zheng, Xuqiang, Ming, Da, Tu, Yaowen, Fu, Qiang, Qi, Nan, Li, Dan, Geng, Li, Wen, Song, Yang, Fenghe, He, Huimin, Liu, Fengman, Xue, Haiyun, Wang, Yuhang, Qiu, Ciyuan, Mi, Guangcan, Li, Yanbo, Chang, Tianhai, Lai, Mingche, Zhang, Luo, Hao, Qinfen, Qin, Mengyuan
Published in Frontiers of Optoelectronics (Online) (20.03.2023)
Published in Frontiers of Optoelectronics (Online) (20.03.2023)
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Journal Article
A 2-40 Gb/s PAM4/NRZ Dual-mode Wireline Transmitter with 4:1 MUX in 65-nm CMOS
Lv, Fangxu, Zheng, Xuqiang, Zhao, Feng, Wang, Jianye, Wang, Ziqiang, Yuan, Shuai, He, Yajun, Zhang, Chun, Wang, Zhihua
Published in Journal of semiconductor technology and science (01.04.2018)
Published in Journal of semiconductor technology and science (01.04.2018)
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Journal Article
A 4-40 Gb/s PAM4 transmitter with output linearity optimization in 65 nm CMOS
Xuqiang Zheng, Chun Zhang, Fangxu Lv, Feng Zhao, Shigang Yue, Ziqiang Wang, Fule Li, Hanjun Jiang, Zhihua Wang
Published in 2017 IEEE Custom Integrated Circuits Conference (CICC) (01.04.2017)
Published in 2017 IEEE Custom Integrated Circuits Conference (CICC) (01.04.2017)
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Conference Proceeding
A 5-50 Gb/s quarter rate transmitter with a 4-tap multiple-MUX based FFE in 65 nm CMOS
Xuqiang Zheng, Chun Zhang, Fangxu Lv, Feng Zhao, Shigang Yue, Ziqiang Wang, Fule Li, Zhihua Wang
Published in ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference (01.09.2016)
Published in ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference (01.09.2016)
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Conference Proceeding
A 4.8-mW/Gb/s 9.6-Gb/s 5 + 1-Lane Source-Synchronous Transmitter in 65-nm Bulk CMOS
Yuan, Shuai, Wang, Ziqiang, Zheng, Xuqiang, Huang, Ke, Xu, Ni, Rhee, Woogeun, Wu, Liji, Zhang, Chun
Published in IEEE transactions on circuits and systems. II, Express briefs (01.04.2014)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.04.2014)
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Journal Article
A 10 GHz 56 fsrms-integrated-jitter and −247 dB FOM ring-VCO based injection-locked clock multiplier with a continuous frequency-tracking loop in 65 nm CMOS
Xuqiang Zheng, Fangxu Lv, Feng Zhao, Shigang Yue, Chun Zhang, Ziqiang Wang, Fule Li, Hanjun Jiang, Zhihua Wang
Published in 2017 IEEE Custom Integrated Circuits Conference (CICC) (01.04.2017)
Published in 2017 IEEE Custom Integrated Circuits Conference (CICC) (01.04.2017)
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Conference Proceeding
A 48mW 15-to-28Gb/s source-synchronous receiver with adaptive DFE using hybrid alternate clock scheme and baud-rate CDR in 65nm CMOS
Yuan, Shuai, Wu, Liji, Wang, Ziqiang, Zheng, Xuqiang, Wang, Peng, Jia, Wen, Zhang, Chun, Wang, Zhihua
Published in ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC) (01.09.2015)
Published in ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC) (01.09.2015)
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Conference Proceeding
Journal Article
A 40-80 Gb/s PAM4 wireline transmitter in 65nm CMOS technology
Fangxu Lv, Xuqiang Zheng, Shuai Yuan, Ziqiang Wang, Yajun He, Chun Zhang, Zhihua Wang, Jianye Wang
Published in 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) (01.08.2017)
Published in 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) (01.08.2017)
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Conference Proceeding
A 50Gb/s low power PAM4 SerDes transmitter with 4-tap FFE and high linearity output voltage in 65nm CMOS technology
Fangxu Lv, Xuqiang Zheng, Ziqiang Wang, Jianye Wang, Fule Li
Published in 2015 IEEE 11th International Conference on ASIC (ASICON) (01.11.2015)
Published in 2015 IEEE 11th International Conference on ASIC (ASICON) (01.11.2015)
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Conference Proceeding
A 75mW 50Gbps SerDes transmitter with automatic serializing time window search in 65nm CMOS technology
Ke Huang, Ziqiang Wang, Xuqiang Zheng, Chun Zhang, Zhihua Wang
Published in Proceedings of the IEEE 2014 Custom Integrated Circuits Conference (01.09.2014)
Published in Proceedings of the IEEE 2014 Custom Integrated Circuits Conference (01.09.2014)
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Conference Proceeding
A 190mW 40Gbps SerDes transmitter and receiver chipset in 65nm CMOS technology
Ke Huang, Deng Luo, Ziqiang Wang, Xuqiang Zheng, Fule Li, Chun Zhang, Zhihua Wang
Published in 2015 IEEE Custom Integrated Circuits Conference (CICC) (01.09.2015)
Published in 2015 IEEE Custom Integrated Circuits Conference (CICC) (01.09.2015)
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Conference Proceeding
A 40Gb/s 39mW 3-tap adaptive closed-loop decision feedback equalizer in 65nm CMOS
Weidong Cao, Ziqiang Wang, Dongmei Li, Xuqiang Zheng, Fule Li, Chun Zhang, Zhihua Wang
Published in 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS) (01.08.2015)
Published in 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS) (01.08.2015)
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Conference Proceeding
A current-to-voltage integrator using area-efficient correlated double sampling technique
Xuqiang Zheng, Fule Li, Xuan Wang, Chun Zhang
Published in 2012 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2012)
Published in 2012 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2012)
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Conference Proceeding
A 10Gbps CDR based on phase interpolator for source synchronous receiver in 65nm CMOS
Shijie Hu, Chen Jia, Ke Huang, Chun Zhang, Xuqiang Zheng, Zhihua Wang
Published in 2012 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2012)
Published in 2012 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2012)
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Conference Proceeding