A CMOS 6-Bit 16-GS/s Time-Interleaved ADC Using Digital Background Calibration Techniques
HUANG, Chun-Cheng, WANG, Chung-Yi, WU, Jieh-Tsorng
Published in IEEE journal of solid-state circuits (01.04.2011)
Published in IEEE journal of solid-state circuits (01.04.2011)
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A 12-Bit 1.25-GS/s DAC in 90 nm CMOS With > 70 dB SFDR up to 500 MHz
TSENG, Wei-Hsin, FAN, Chi-Wei, WU, Jieh-Tsorng
Published in IEEE journal of solid-state circuits (01.12.2011)
Published in IEEE journal of solid-state circuits (01.12.2011)
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A Multiphase Timing-Skew Calibration Technique Using Zero-Crossing Detection
Wang, C.-Y., Wu, J.-T.
Published in IEEE transactions on circuits and systems. I, Regular papers (01.06.2009)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.06.2009)
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A CMOS 5.37-mW 10-Bit 200-MS/s Dual-Path Pipelined ADC
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A CMOS 15-bit 125-MS/s Time-Interleaved ADC With Digital Background Calibration
LEE, Zwei-Mei, WANG, Cheng-Yeh, WU, Jieh-Tsorng
Published in IEEE journal of solid-state circuits (01.10.2007)
Published in IEEE journal of solid-state circuits (01.10.2007)
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A CMOS 8-Bit 1.6-GS/s DAC With Digital Random Return-to-Zero
Tseng, Wei-Hsin, Wu, Jieh-Tsorng, Chu, Yung-Cheng
Published in IEEE transactions on circuits and systems. II, Express briefs (01.01.2011)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.01.2011)
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A Robust and Fast Digital Background Calibration Technique for Pipelined ADCs
Fan, Jen-Lin, Wang, Chung-Yi, Wu, Jieh-Tsorng
Published in IEEE transactions on circuits and systems. I, Regular papers (01.06.2007)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.06.2007)
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A 15-b 40-MS/s CMOS pipelined analog-to-digital converter with digital background calibration
LIU, Hung-Chih, LEE, Zwei-Mei, WU, Jieh-Tsomg
Published in IEEE journal of solid-state circuits (01.05.2005)
Published in IEEE journal of solid-state circuits (01.05.2005)
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A 1-V 100-dB dynamic range 24.4-kHz bandwidth delta-sigma modulator
Chia-Ling Chang, Jieh-Tsorng Wu
Published in 2013 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2013)
Published in 2013 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2013)
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An 8-bit 10-GHz 21-mW Time-Interleaved SAR ADC With Grouped DAC Capacitors and Dual-Path Bootstrapped Switch
Swindlehurst, Eric, Jensen, Hunter, Petrie, Alexander, Song, Yixin, Kuan, Yen-Cheng, Qu, Yong, Chang, Mau-Chung Frank, Wu, Jieh-Tsorng, Chiang, Shiuh-Hua Wood
Published in IEEE journal of solid-state circuits (01.08.2021)
Published in IEEE journal of solid-state circuits (01.08.2021)
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A Digital Jitter Compensation Technique for Analog-to-Digital Converters
Wang, Ding-Hao, Wu, Jieh-Tsorng
Published in 2023 IEEE International Symposium on Circuits and Systems (ISCAS) (21.05.2023)
Published in 2023 IEEE International Symposium on Circuits and Systems (ISCAS) (21.05.2023)
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