A New Low-Voltage Triggering SCR for the Protection of a Double RESURF HV-LDMOS
Wu, Cheng-Hsu, Lee, Jian-Hsing, Lien, Chen-Hsin
Published in IEEE electron device letters (01.09.2016)
Published in IEEE electron device letters (01.09.2016)
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Journal Article
A Novel Drain Design for ESD Improvement of UHV-LDMOS
Wu, Cheng-Hsu, Lee, Jian-Hsing, Lien, Chenhsin
Published in IEEE transactions on electron devices (01.12.2015)
Published in IEEE transactions on electron devices (01.12.2015)
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Journal Article
Failure mechanism of high-voltage isolated lateral diffused NMOS under high-current events
Cheng-Hsu Wu, Chen-Hsin Lien, Jian-Hsing Lee
Published in 2016 IEEE International Reliability Physics Symposium (IRPS) (01.04.2016)
Published in 2016 IEEE International Reliability Physics Symposium (IRPS) (01.04.2016)
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Conference Proceeding
A voltage base electrothermal model for the interconnection and E-Fuse under the DC and pulse stresses
Jian-Hsing Lee, Prabhu, Manjunatha, Iyer, Natarajan Mahadeva, Cheng-Hsu Wu, Chen-Hsin Lien
Published in 2014 IEEE International Reliability Physics Symposium (01.06.2014)
Published in 2014 IEEE International Reliability Physics Symposium (01.06.2014)
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Conference Proceeding
On-chip surge protection circuit
Hsu, Cheng-Chieh, Chen, Hung-Wei, Jao, Che-Yuan, Hsieh, Tsung-Hsien, Wu, Cheng-Hsu
Year of Publication 22.02.2022
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Year of Publication 22.02.2022
Patent
ESD structure without ballasting resistors
Lin, Shu Huei, Lee, Jian Hsing, Huang, Shao Chang, Wu, Cheng Hsu, Lee, Chuan Ying
Year of Publication 28.07.2009
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Year of Publication 28.07.2009
Patent
ESD structure without ballasting resistors
HUANG SHAOANG, LIN SHU HUEI, LEE JIAN-HSING, LEE CHUAN YING, WU CHENG HSU
Year of Publication 04.09.2008
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Year of Publication 04.09.2008
Patent
ESD structure without ballasting resistors
LEE JIAN HSING, LIN SHU HUEI, LEE CHUAN YING, HUANG SHAO CHANG, WU CHENG HSU
Year of Publication 28.07.2009
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Year of Publication 28.07.2009
Patent