Search Results - "Woo, Byungsuk" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

Receiver receiving multi-level signal, memory device including the same and method of receiving data using the same

Receiver receiving multi-level signal, memory device including the same and method of receiving data using the same

by Woo, Byungsuk, Lee, Sucheol, Seol, Changkyu
Year of Publication 24.09.2024

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Patent

Method of generating signal for test in memory device using multi-level signaling and memory device performing the same

Method of generating signal for test in memory device using multi-level signaling and memory device performing the same

by Woo, Byungsuk, Cho, Yongho, Chang, Younguk
Year of Publication 12.09.2023

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Patent

Receiver performing background training, memory device including the same and method of receiving data using the same

Receiver performing background training, memory device including the same and method of receiving data using the same

by Woo, Byungsuk, Lee, Sucheol, Seol, Changkyu
Year of Publication 04.04.2023

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Patent

RECEIVER RECEIVING MULTI-LEVEL SIGNAL, MEMORY DEVICE INCLUDING THE SAME AND METHOD OF RECEIVING DATA USING THE SAME

RECEIVER RECEIVING MULTI-LEVEL SIGNAL, MEMORY DEVICE INCLUDING THE SAME AND METHOD OF RECEIVING DATA USING THE SAME

by Woo, Byungsuk, Lee, Sucheol, Seol, Changkyu
Year of Publication 02.02.2023

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Patent

Multi-level signal generator and memory device including the same

Multi-level signal generator and memory device including the same

by Woo, Byungsuk, Cho, Yongho, Chang, Younguk
Year of Publication 31.01.2023

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Patent

Receivers for performing reference voltage training and memory systems including the same

Receivers for performing reference voltage training and memory systems including the same

by Woo, Byungsuk, Lee, Sucheol, Seol, Changkyu
Year of Publication 15.11.2022

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Patent

Receiver receiving multi-level signal, memory device including the same and method of receiving data using ihe same

Receiver receiving multi-level signal, memory device including the same and method of receiving data using ihe same

by Woo, Byungsuk, Lee, Sucheol, Seol, Changkyu
Year of Publication 08.11.2022

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Patent

Memory device, data outputting method thereof, and memory system having the same

Memory device, data outputting method thereof, and memory system having the same

by Woo, Byungsuk, Lee, Sucheol, Seol, Changkyu
Year of Publication 20.09.2022

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Patent

RECEIVER RECEIVING MULTI-LEVEL SIGNAL, MEMORY DEVICE INCLUDING THE SAME AND METHOD OF RECEIVING DATA USING THE SAME

RECEIVER RECEIVING MULTI-LEVEL SIGNAL, MEMORY DEVICE INCLUDING THE SAME AND METHOD OF RECEIVING DATA USING THE SAME

by Woo, Byungsuk, Lee, Sucheol, Seol, Changkyu
Year of Publication 07.07.2022

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Patent

RECEIVERS FOR PERFORMING REFERENCE VOLTAGE TRAINING AND MEMORY SYSTEMS INCLUDING THE SAME

RECEIVERS FOR PERFORMING REFERENCE VOLTAGE TRAINING AND MEMORY SYSTEMS INCLUDING THE SAME

by LEE, Sucheol, WOO, Byungsuk, SEOL, Changkyu
Year of Publication 23.06.2022

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Patent

MEMORY DEVICE, DATA OUTPUTING METHOD THEREOF, AND MEMORY SYSTEM HAVING THE SAME

MEMORY DEVICE, DATA OUTPUTING METHOD THEREOF, AND MEMORY SYSTEM HAVING THE SAME

by LEE, Sucheol, WOO, Byungsuk, SEOL, Changkyu
Year of Publication 16.06.2022

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Patent

RECEIVER PERFORMING BACKGROUND TRAINING, MEMORY DEVICE INCLUDING THE SAME AND METHOD OF RECEIVING DATA USING THE SAME

RECEIVER PERFORMING BACKGROUND TRAINING, MEMORY DEVICE INCLUDING THE SAME AND METHOD OF RECEIVING DATA USING THE SAME

by Woo, Byungsuk, Lee, Sucheol, Seol, Changkyu
Year of Publication 02.06.2022

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Patent

A Novel Method for LPDDR5 DRAM Jitter Measurement Through De-embedding

A Novel Method for LPDDR5 DRAM Jitter Measurement Through De-embedding

by Lee, Manho, Cho, Chulhee, Lee, Hyeongi, Park, Sehoon, Hong, Wonseok, Woo, ByungSuk, Choi, Woo-Shin, Cho, Young-Chul, Sohn, Young-Soo, Choi, Jung-Hwan
Published in 2024 IEEE 74th Electronic Components and Technology Conference (ECTC) (28.05.2024)

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Conference Proceeding

MULTI-LEVEL SIGNAL GENERATOR AND MEMORY DEVICE INCLUDING THE SAME

MULTI-LEVEL SIGNAL GENERATOR AND MEMORY DEVICE INCLUDING THE SAME

by Woo, Byungsuk, Cho, Yongho, Chang, Younguk
Year of Publication 21.04.2022

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Patent

METHOD OF GENERATING SIGNAL FOR TEST IN MEMORY DEVICE USING MULTI-LEVEL SIGNALING AND MEMORY DEVICE PERFORMING THE SAME

METHOD OF GENERATING SIGNAL FOR TEST IN MEMORY DEVICE USING MULTI-LEVEL SIGNALING AND MEMORY DEVICE PERFORMING THE SAME

by CHANG, Younguk, CHO, Yongho, WOO, Byungsuk
Year of Publication 21.04.2022

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Patent

High bandwidth memory system using multilevel signaling

High bandwidth memory system using multilevel signaling

by Woo, Byungsuk, Park, Chanik, Park, Cheolmin, Lee, Sucheol, Seol, Changkyu
Year of Publication 18.04.2023

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Patent

HIGH BANDWIDTH MEMORY SYSTEM USING MULTILEVEL SIGNALING

HIGH BANDWIDTH MEMORY SYSTEM USING MULTILEVEL SIGNALING

by Woo, Byungsuk, Park, Chanik, Park, Cheolmin, Lee, Sucheol, Seol, Changkyu
Year of Publication 28.07.2022

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Patent

Self-calibrating transceiver for source synchronous clocking system with on-chip TDR and swing level control scheme

Self-calibrating transceiver for source synchronous clocking system with on-chip TDR and swing level control scheme

by Jang, Young-Chan, Park, Joon-Young, Shin, Sungcheol, Choi, Hundae, Lee, Kyongsu, Woo, Byungsuk, Park, Hwanwook, Kim, Woo-Seop, Choi, Youngdon, Kim, Jaekwan, Kim, Hyun-Kyung, Kim, Jayoung, Lim, Suyoun, Chung, Su-Jin, Kim, Sora, Yoo, Jeihwan, Kim, Changhyun
Published in 2009 Symposium on VLSI Circuits (01.06.2009)

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Conference Proceeding