Top-level activity-driven clock tree synthesis with clock skew variation considered
Wang, Te-Jui, Huang, Shih-Hsu, Cheng, Wei-Kai, Chou, Yih-Chih
Published in 2016 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2016)
Published in 2016 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2016)
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