A built-in self-test and self-diagnosis scheme for embedded SRAM
Chih-Wea Wang, Chi-Feng Wu, Jin-Fu Li, Cheng-Wen Wu, Teng, T., Chiu, K., Hsiao-Ping Lin
Published in Proceedings - Asian Test Symposium (2000)
Published in Proceedings - Asian Test Symposium (2000)
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Conference Proceeding
Journal Article
A built-in self-test and self-diagnosis scheme for heterogeneous SRAM clusters
Wang, Chih-Wea, Tzeng, Ruey-Shing, Wu, Chi-Feng, Huang, Chih-Tsun, Wu, Cheng-Wen, Huang, Shi-Yu, Lin, Shyh-Horng, Wang, Hsin-Po
Published in Proceedings - Asian Test Symposium (2001)
Published in Proceedings - Asian Test Symposium (2001)
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Journal Article
An SOC test integration platform and its industrial realization
CHENG, Kuo-Liang, HUANG, Jing-Reng, WANG, Chih-Wea, LO, Chih-Yen, DENQ, Li-Ming, HUANG, Chih-Tsun, WU, Cheng-Wen, HUNG, Shin-Wei, LEE, Jye-Yuan
Published in 2004 International Conferce on Test (2004)
Published in 2004 International Conferce on Test (2004)
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Error catch and analysis for semiconductor memories using March tests
Wu, Chi-Feng, Huang, Chih-Tsun, Wang, Chih-Wea, Cheng, Kuo-Liang, Wu, Cheng-Wen
Published in Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design (2000)
Published in Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design (2000)
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Journal Article
On-chip interconnection design and SoC integration with OCP
Chih-Wea Wang, Chi-Shao Lai, Chi-Feng Wu, Shih-Arn Hwang, Ying-Hsi Lin
Published in 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) (01.04.2008)
Published in 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) (01.04.2008)
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Optimization for application-specific packet-based on-chip interconnects using a cycle-accurate model
Yu-Ju Shih, Chih-Tsun Huang, Jing-Jia Liou, Jyu-Yuan Lai, Chih-Wea Wang, Chi-Feng Wu
Published in 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) (01.04.2017)
Published in 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) (01.04.2017)
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Conference Proceeding
Simulation-based test algorithm generation and port scheduling for multi-port memories
Wu, Chi-Feng, Huang, Chih-Tsun, Cheng, Kuo-Liang, Wang, Chih-Wea, Wu, Cheng-Wen
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 38th conference on Design automation (2001)
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 38th conference on Design automation (2001)
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Conference Proceeding
A Built-in Self-Test Scheme with Diagnostics Support for Embedded SRAM
Wang, Chih-wea, Wu, Chi-feng, Li, Jin-fu, Wu, Cheng-wen, Teng, Tony, Chiu, Kevin, Lin, Hsiao-ping
Published in Journal of electronic testing (01.12.2002)
Published in Journal of electronic testing (01.12.2002)
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Journal Article
RAMSES-FT: a fault simulator for flash memory testing and diagnostics
Kuo-Liang Cheng, Jen-Chieh Yeh, Chih-Wea Wang, Chih-Tsun Huang, Cheng-Wen Wu
Published in Proceedings 20th IEEE VLSI Test Symposium (VTS 2002) (2002)
Published in Proceedings 20th IEEE VLSI Test Symposium (VTS 2002) (2002)
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Conference Proceeding
Fault pattern oriented defect diagnosis for memories
Chih-Wea Wang, Kuo-Liang Cheng, Jih-Nung Lee, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu
Published in International Test Conference, 2003. Proceedings. ITC 2003 (2003)
Published in International Test Conference, 2003. Proceedings. ITC 2003 (2003)
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Conference Proceeding
Test and diagnosis of word-oriented multiport memories
Chih-Wea Wang, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu
Published in Proceedings. 21st VLSI Test Symposium, 2003 (2003)
Published in Proceedings. 21st VLSI Test Symposium, 2003 (2003)
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Conference Proceeding
Test scheduling of BISTed memory cores for SoC
Chih-Wea Wang, Jing-Reng Huang, Yen-Fu Lin, Kuo-Liang Cheng, Chih-Tsun Huang, Chen-Wen Wu, Youn-Long Lin
Published in Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02) (2002)
Published in Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02) (2002)
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Conference Proceeding
Test scheduling and test access architecture optimization for system-on-chip
Huan-Shan Hsu, Jing-Reng Huang, Kuo-Liang Cheng, Chih-Wea Wang, Chih-Tsun Huang, Cheng-Wen Wu, Youn-Long Lin
Published in Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02) (2002)
Published in Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02) (2002)
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Conference Proceeding
Test for more than pass/fail using on-chip temperature sensor
Chih-Wea Wang, Chen-Tung Lin, Chun-Chieh Hsu, Ching-Tung Wu, Chi-Feng Wu
Published in Proceedings of Technical Program of 2012 VLSI Design, Automation and Test (01.04.2012)
Published in Proceedings of Technical Program of 2012 VLSI Design, Automation and Test (01.04.2012)
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Conference Proceeding
FAME: A Fault-Pattern Based Memory Failure Analysis Framework
Cheng, Kuo-Liang, Wang, Chih-Wea, Lee, Jih-Nung, Chou, Yung-Fa, Huang, Chih-Tsun, Wu, Cheng-Wen
Published in International Conference on Computer Aided Design: Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design; 09-13 Nov. 2003 (09.11.2003)
Published in International Conference on Computer Aided Design: Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design; 09-13 Nov. 2003 (09.11.2003)
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