Design methodology of a 1.2- mu m double-level-metal CMOS technology
Preckshot, N E, Campbell, S A, Heikkila, W W, Dokos, D, Passow, R H, Grant, W N, Schultz, D, Victorey, J P
Published in IEEE transactions on electron devices (01.01.1984)
Published in IEEE transactions on electron devices (01.01.1984)
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Journal Article
Design methodology of a 1.2-μm double-level-metal CMOS technology
PRECKSHOT, N. E, CAMPBELL, S. A, HEIKKILA, W. W, DOKOS, D, PASSOW, R. H, GRANT, W. N, SCHULTZ, D, VICTOREY, J. P
Published in IEEE journal of solid-state circuits (01.01.1984)
Published in IEEE journal of solid-state circuits (01.01.1984)
Get full text
Journal Article
Design methodology of a 1.2-mum double-level-metal CMOS technology
Campbell, S A, Heikkila, W W, Dokos, D, Passow, R H, Grant, W N, Schultz, D, Victorey, J P
Published in IEEE journal of solid-state circuits (01.02.1984)
Get full text
Published in IEEE journal of solid-state circuits (01.02.1984)
Journal Article