Automatic Constraint Based Test Generation for Behavioral HDL Models
Sastry Hari, Siva Kumar, Reddy Konda, Vishnu Vardhan, Kamakoti, V., Vedula, Vivekananda M., Maneperambil, Kailasnath S.
Published in IEEE transactions on very large scale integration (VLSI) systems (01.04.2008)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.04.2008)
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Journal Article
Power Virus Generation Using Behavioral Models of Circuits
Najeeb, K., Vardhan, V., Konda, R., Kumar, S., Hari, S., Kamakoti, V., Vedula, V.M.
Published in 25th IEEE VLSI Test Symposium (VTS'07) (01.05.2007)
Published in 25th IEEE VLSI Test Symposium (VTS'07) (01.05.2007)
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Conference Proceeding
Controllability-driven Power Virus Generation for Digital Circuits
Najeeb, K., Gururaj, K., Kamakoti, V., Vedula, V.M.
Published in 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) (01.01.2007)
Published in 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) (01.01.2007)
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Conference Proceeding
Taming the Complexity of STE-based Design Verification Using Program Slicing
Vedula, V.M., Andersen, F.L., Abraham, J.A.
Published in 2006 IEEE International High Level Design Validation and Test Workshop (01.11.2006)
Published in 2006 IEEE International High Level Design Validation and Test Workshop (01.11.2006)
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Conference Proceeding
FACTOR: a hierarchical methodology for functional test generation and testability analysis
Vedula, V.M., Abraham, J.A.
Published in Design, Automation, and Test in Europe: Proceedings of the conference on Design, automation and test in Europe; 04-08 Mar. 2002 (2002)
Published in Design, Automation, and Test in Europe: Proceedings of the conference on Design, automation and test in Europe; 04-08 Mar. 2002 (2002)
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Conference Proceeding
Program slicing for hierarchical test generation
Vedula, V.M., Abraham, J.A., Bhadra, J.
Published in Proceedings 20th IEEE VLSI Test Symposium (VTS 2002) (2002)
Published in Proceedings 20th IEEE VLSI Test Symposium (VTS 2002) (2002)
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Conference Proceeding
Program slicing for ATPG-based property checking
Vedula, V.M., Townsend, W.J., Abraham, J.A.
Published in 17th International Conference on VLSI Design. Proceedings (2004)
Published in 17th International Conference on VLSI Design. Proceedings (2004)
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Conference Proceeding
Native mode functional self-test generation for Systems-on-Chip
Jayaraman, K., Vedula, V.M., Abraham, J.A.
Published in Proceedings International Symposium on Quality Electronic Design (2002)
Published in Proceedings International Symposium on Quality Electronic Design (2002)
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Conference Proceeding