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Year of Publication 20.12.2006
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Compaction of architected registers in a simultaneous multithreading processor
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Year of Publication 26.09.2023
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Blocking instruction fetching in a computer processor
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Techniques for predicting a target address of an indirect branch instruction
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Year of Publication 16.07.2019
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Year of Publication 16.07.2019
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Managing an effective address table in a multi-slice processor
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Year of Publication 02.04.2019
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Year of Publication 02.04.2019
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Managing an effective address table in a multi-slice processor
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Year of Publication 26.03.2019
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Most favored branch issue
Ayub, Salma, Mueller, Christopher M, Van Norstrand, Jr., Albert J, Nguyen, Dung Q, Ward, Kenneth L, Tolentino, Eula Faye Abalos, Kincaid, Glenn O
Year of Publication 10.11.2020
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Year of Publication 10.11.2020
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Thread migration using a microcode engine of a multi-slice processor
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Year of Publication 20.08.2019
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Year of Publication 20.08.2019
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Multi-level history buffer for transaction memory in a microprocessor
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Year of Publication 28.01.2020
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Year of Publication 28.01.2020
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MOST FAVORED BRANCH ISSUE
Ayub, Salma, Mueller, Christopher M, Van Norstrand, Jr., Albert J, Nguyen, Dung Q, Ward, Kenneth L, Tolentino, Eula Faye Abalos, Kincaid, Glenn O
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Year of Publication 09.01.2020
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MANAGING AN EFFECTIVE ADDRESS TABLE IN A MULTI-SLICE PROCESSOR
GIRI AKASH V, VAN NORSTRAND, Jr. ALBERT J, LEVITAN DAVID S, PATEL MEHUL
Year of Publication 30.11.2017
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Year of Publication 30.11.2017
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Asynchronous flush and restore of distributed history buffer
Van Norstrand, Jr., Albert J, Nguyen, Dung Q, Battle, Steven J, Terry, David R, Thompto, Brian W, Bowman, Joshua W, Barrick, Brian D, Chadha, Sundeep
Year of Publication 13.08.2019
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Year of Publication 13.08.2019
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