Search Results - "VERBRUGGEN, BOB" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

Digitally Modulated CMOS Polar Transmitters for Highly-Efficient mm-Wave Wireless Communication

Digitally Modulated CMOS Polar Transmitters for Highly-Efficient mm-Wave Wireless Communication

by Khalaf, Khaled, Vidojkovic, Vojkan, Vaesen, Kristof, Libois, Michael, Mangraviti, Giovanni, Szortyka, Viki, Chunshu Li, Verbruggen, Bob, Ingels, Mark, Bourdoux, Andre, Soens, Charlotte, Van Thillo, Wim, Long, John R., Wambacq, Piet
Published in IEEE journal of solid-state circuits (01.07.2016)

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Journal Article

HIV surveillance systems in the Asia Pacific region

HIV surveillance systems in the Asia Pacific region

by Loo, Virginia, Saidel, Tobi, Reddy, Amala, Htin, Khin Cho Win, Shwe, Ye Yu, Verbruggen, Bob
Published in Western Pacific surveillance and response journal (01.09.2012)

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Journal Article

Introduction to the Special Issue on the 2019 IEEE International Solid-State Circuits Conference (ISSCC)

Introduction to the Special Issue on the 2019 IEEE International Solid-State Circuits Conference (ISSCC)

by Chae, Youngcheol, Wicht, Bernhard, Verbruggen, Bob, Heydari, Payam, Luong, Howard
Published in IEEE journal of solid-state circuits (01.12.2019)

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Journal Article

A 70 dB DR 10 b 0-to-80 MS/s Current-Integrating SAR ADC With Adaptive Dynamic Range

A 70 dB DR 10 b 0-to-80 MS/s Current-Integrating SAR ADC With Adaptive Dynamic Range

by Malki, Badr, Yamamoto, Takaya, Verbruggen, Bob, Wambacq, Piet, Craninckx, Jan
Published in IEEE journal of solid-state circuits (01.05.2014)

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Journal Article

A 0.9 V 0.4-6 GHz Harmonic Recombination SDR Receiver in 28 nm CMOS With HR3/HR5 and IIP2 Calibration

A 0.9 V 0.4-6 GHz Harmonic Recombination SDR Receiver in 28 nm CMOS With HR3/HR5 and IIP2 Calibration

by van Liempd, Barend, Borremans, Jonathan, Martens, Ewout, Sungwoo Cha, Suys, Hans, Verbruggen, Bob, Craninckx, Jan
Published in IEEE journal of solid-state circuits (01.08.2014)

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Journal Article

A 150 kHz-80 MHz BW Discrete-Time Analog Baseband for Software-Defined-Radio Receivers using a 5th-Order IIR LPF, Active FIR and a 10 bit 300 MS/s ADC in 28 nm CMOS

A 150 kHz-80 MHz BW Discrete-Time Analog Baseband for Software-Defined-Radio Receivers using a 5th-Order IIR LPF, Active FIR and a 10 bit 300 MS/s ADC in 28 nm CMOS

by Malki, Badr, Verbruggen, Bob, Martens, Ewout, Wambacq, Piet, Craninckx, Jan
Published in IEEE journal of solid-state circuits (01.07.2016)

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Journal Article

A 1.7 mW 11b 250 MS/s 2-Times Interleaved Fully Dynamic Pipelined SAR ADC in 40 nm Digital CMOS

A 1.7 mW 11b 250 MS/s 2-Times Interleaved Fully Dynamic Pipelined SAR ADC in 40 nm Digital CMOS

by Verbruggen, B., Iriguchi, M., Craninckx, J.
Published in IEEE journal of solid-state circuits (01.12.2012)

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Journal Article Conference Proceeding

A 60 dB SNDR 35 MS/s SAR ADC With Comparator-Noise-Based Stochastic Residue Estimation

A 60 dB SNDR 35 MS/s SAR ADC With Comparator-Noise-Based Stochastic Residue Estimation

by Verbruggen, Bob, Tsouhlarakis, Jorgo, Yamamoto, Takaya, Iriguchi, Masao, Martens, Ewout, Craninckx, Jan
Published in IEEE journal of solid-state circuits (01.09.2015)

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Journal Article

Session 27 Overview: Discrete-Time ADCs

Session 27 Overview: Discrete-Time ADCs

by Keane, John, Hsieh, Chih-Cheng, Verbruggen, Bob
Published in 2021 IEEE International Solid-State Circuits Conference (ISSCC) (13.02.2021)

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Conference Proceeding

A 150 MS/s 133 μW 7 bit ADC in 90 nm Digital CMOS

A 150 MS/s 133 μW 7 bit ADC in 90 nm Digital CMOS

by VAN DER PLAS, Geert, VERBRUGGEN, Bob
Published in IEEE journal of solid-state circuits (01.12.2008)

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Conference Proceeding Journal Article

A 40 nm CMOS 0.4-6 GHz Receiver Resilient to Out-of-Band Blockers

A 40 nm CMOS 0.4-6 GHz Receiver Resilient to Out-of-Band Blockers

by Borremans, J., Mandal, G., Giannini, V., Debaillie, B., Ingels, M., Sano, T., Verbruggen, B., Craninckx, J.
Published in IEEE journal of solid-state circuits (01.07.2011)

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Journal Article

디지털 빔포밍 레이더 시스템들의 위상 잡음 보상

디지털 빔포밍 레이더 시스템들의 위상 잡음 보상

by FARLEY BRENDAN, VERBRUGGEN BOB W, ERDMANN CHRISTOPHE
Year of Publication 11.08.2021

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Patent

A 7.4-to-14GHz PLL with 54fsrms jitter in 16nm FinFET for integrated RF-data-converter SoCs

A 7.4-to-14GHz PLL with 54fsrms jitter in 16nm FinFET for integrated RF-data-converter SoCs

by Turker, Didem, Bekele, Ade, Upadhyaya, Parag, Verbruggen, Bob, Ying Cao, Shaojun Ma, Erdmann, Christophe, Farley, Brendan, Frans, Yohan, Ken Chang
Published in 2018 IEEE International Solid - State Circuits Conference - (ISSCC) (01.02.2018)

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Conference Proceeding

전류 스티어링 디지털-아날로그 변환기의 내장형 VOP(VARIABLE OUTPUT POWER)

전류 스티어링 디지털-아날로그 변환기의 내장형 VOP(VARIABLE OUTPUT POWER)

by VERBRUGGEN BOB, PELLICONI ROBERTO, FARLEY BRENDAN, ERDMANN CHRISTOPHE
Year of Publication 14.07.2022

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Patent

Correction to "A 70 dB DR 10 b 0-to-80 MS/s Current-Integrating SAR ADC With Adaptive Dynamic Range" [May 14 1173-1183]

Correction to "A 70 dB DR 10 b 0-to-80 MS/s Current-Integrating SAR ADC With Adaptive Dynamic Range" [May 14 1173-1183]

by Malki, Badr, Yamamoto, Takaya, Verbruggen, Bob, Wambacq, Piet, Craninckx, Jan
Published in IEEE journal of solid-state circuits (01.02.2015)

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Journal Article

A 2.4 GHz Low-Power Sixth-Order RF Bandpass ΔΣ Converter in CMOS

A 2.4 GHz Low-Power Sixth-Order RF Bandpass ΔΣ Converter in CMOS

by RYCKAERT, Julien, BORREMANS, Jonathan, VERBRUGGEN, Bob, BOS, Lynn, ARMIENTO, Costantino, CRANINCKX, Jan, VAN DER PLAS, Geert
Published in IEEE journal of solid-state circuits (01.11.2009)

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Conference Proceeding

A 2.6 mW 6 bit 2.2 GS/s Fully Dynamic Pipeline ADC in 40 nm Digital CMOS

A 2.6 mW 6 bit 2.2 GS/s Fully Dynamic Pipeline ADC in 40 nm Digital CMOS

by Verbruggen, Bob, Craninckx, Jan, Kuijk, Maarten, Wambacq, Piet, Van der Plas, Geert
Published in IEEE journal of solid-state circuits (01.10.2010)

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Journal Article

INTERLEAVED PIPELINED BINARY SEARCH A/D CONVERTER

INTERLEAVED PIPELINED BINARY SEARCH A/D CONVERTER

by VERBRUGGEN BOB
Year of Publication 14.06.2012

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Patent

시간 인터리빙된 아날로그-디지털 변환기에서의 초핑 스위치 시간-스큐 교정

시간 인터리빙된 아날로그-디지털 변환기에서의 초핑 스위치 시간-스큐 교정

by VAZ BRUNO MIGUEL, VERBRUGGEN BOB W, ERDMANN CHRISTOPHE
Year of Publication 16.11.2020

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Patent

이중-경로 디지털-시간 변환기

이중-경로 디지털-시간 변환기

by XIMENES AUGUSTO R, VERBRUGGEN BOB W, ERDMANN CHRISTOPHE
Year of Publication 15.06.2020

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Patent

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