System and method for estimating test escapes in integrated circuits
Butler, Kenneth M, Carulli, Jr, John M, Saxena, Jayashree, Vasavada, Amit P
Year of Publication 04.01.2011
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Year of Publication 04.01.2011
Patent
System and method for estimating test escapes in integrated circuits
BUTLER KENNETH M, SAXENA JAYASHREE, CARULLI, JR. JOHN M, VASAVADA AMIT P
Year of Publication 04.01.2011
Get full text
Year of Publication 04.01.2011
Patent
SYSTEM AND METHOD FOR ESTIMATING TEST ESCAPES IN INTEGRATED CIRCUITS
BUTLER KENNETH M, SAXENA JAYASHREE, CARULLI, JR. JOHN M, VASAVADA AMIT P
Year of Publication 20.08.2009
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Year of Publication 20.08.2009
Patent