Method of Forming an Epitaxial Stack on a Plurality of Substrates
JONGBLOED BERT, VAN AERDE STEVEN, WESTROM PETER, HOUBEN KELLY, VERWEIJ WILCO, PIERREUX DIETER
Year of Publication 21.07.2023
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Year of Publication 21.07.2023
Patent
METHOD AND APPARATUS FOR FILLING A GAP
JONGBLOED BERT, VAN AERDE STEVEN, KNAEPEN WERNER, FUKAZAWA ATSUKI, HAUKKA SUVI, PIERREUX DIETER, PORE VILJAMI, FUKUDA HIDEAKI
Year of Publication 04.12.2023
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Year of Publication 04.12.2023
Patent
METHOD FOR FORMING A LAYER PROVIDED WITH SILICON
JONGBLOED BERT, VAN AERDE STEVEN, KNAEPEN WERNER, HOUBEN KELLY, VERWEIJ WILCO, PIERREUX DIETER
Year of Publication 31.12.2021
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Year of Publication 31.12.2021
Patent
METHOD AND APPARATUS FOR FILLING A GAP
JONGBLOED BERT, VAN AERDE STEVEN, KNAEPEN WERNER, FUKAZAWA ATSUKI, HAUKKA SUVI, PIERREUX DIETER, PORE VILJAMI, FUKUDA HIDEAKI
Year of Publication 07.09.2022
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Year of Publication 07.09.2022
Patent
METHOD AND WAFER PROCESSING FURNACE FOR FORMING AN EPITAXIAL STACK ON A PLURALITY OF SUBSTRATES
JONGBLOED BERT, VAN AERDE STEVEN, WESTROM PETER, HOUBEN KELLY, VERWEIJ WILCO, KHAZAKA RAMI, PIERREUX DIETER, MISKIN CALEB, ELLEUCH OMAR, ARYEETEY FREDERICK
Year of Publication 20.07.2023
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Year of Publication 20.07.2023
Patent
Method for providing a semiconductor device with silicon filled gaps
TROVATO ANNA, VAN AERDE STEVEN R. A, JONGBLOED BERT, HOUBEN KELLY, PIERREUX DIETER, VERWEIJ WILCO A
Year of Publication 26.05.2021
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Year of Publication 26.05.2021
Patent
FORMING SEMICONDUCTOR DEVICE BY PROVIDING AN AMORPHOUS SILICON CORE WITH A HARD MASK LAYER
VAN AERDE STEVEN R. A, JONGBLOED BERT, KNAEPEN WERNER, HOUBEN KELLY, STOKHOF MAARTEN, PIERREUX DIETER
Year of Publication 11.10.2018
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Year of Publication 11.10.2018
Patent
SEMICONDUCTOR DEVICE WITH AMORPHOUS SILICON FILLED GAPS AND METHODS FOR FORMING
JONGBLOED BERT, HOUBEN KELLY, VAN AERDE STEVEN R.A, STOKHOF MAARTEN, PIERREUX DIETER
Year of Publication 11.10.2018
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Year of Publication 11.10.2018
Patent
Novel dual layer floating gate structure as enabler of fully planar flash memory
Blomme, P, Rosmeulen, M, Cacciato, A, Kostermans, M, Vrancken, C, Van Aerde, S, Schram, T, Debusschere, I, Jurczak, M, Van Houdt, J
Published in 2010 Symposium on VLSI Technology (01.06.2010)
Published in 2010 Symposium on VLSI Technology (01.06.2010)
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갭을 충진하기 위한 방법 및 장치
JONGBLOED BERT, VAN AERDE STEVEN, KNAEPEN WERNER, FUKAZAWA ATSUKI, HAUKKA SUVI, PIERREUX DIETER, PORE VILJAMI, FUKUDA HIDEAKI
Year of Publication 03.04.2019
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Year of Publication 03.04.2019
Patent
SUBSTRATE PROCESSING APPARATUS AND METHOD
JONGBLOED BERT, VAN AERDE STEVEN, KNAEPEN WERNER, HOUBEN KELLY, JDIRA LUCIAN, PIERREUX DIETER, DE RIDDER CHRIS, OOSTERLAKEN THEODORUS, HERBSCHLEB CORNELIS THADDEUS
Year of Publication 10.10.2019
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Year of Publication 10.10.2019
Patent
PROCESS FOR FORMING SILICON-FILLED OPENINGS WITH A REDUCED OCCURRENCE OF VOIDS
VAN AERDE STEVEN R.A, VAN DER JEUGD CORNELIUS A, OOSTERLAKEN THEODORUS G.M
Year of Publication 27.01.2016
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Year of Publication 27.01.2016
Patent
Scaling of Floating Gate electrode for sub-40nm flash technologies
De Vos, J., Wellekens, D., Debusschere, I., Van Houdt, J., Van Aerde, S.R.A., Fischer, P.R., Zagwijn, P.M.
Published in ESSDERC 2008 - 38th European Solid-State Device Research Conference (01.09.2008)
Published in ESSDERC 2008 - 38th European Solid-State Device Research Conference (01.09.2008)
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