Showing
1 - 20
results of
172
for search '
"VAJANA, BRUNO"
'
Skip to content
Portal K.UTB
Čeština
Login
TBU Catalog
e-resources
E-THESES
All Fields
Title
Author
Subject
Find
Advanced Search
Search Results - "VAJANA, BRUNO"
Showing
1 - 20
results of
172
for search '
"VAJANA, BRUNO"
'
, query time: 1.86s
Refine Results
Sort
Relevance
Date Descending
Date Ascending
1
Loading…
Process for manufacturing electronic devices comprising high-voltage MOS and EEPROM transistors
by
VAJANA
,
BRUNO
,
PATELMO, MATTEO
Year of Publication
26.05.2010
Get full text
Patent
Save to List
Saved in:
2
Loading…
Method of fabricating EEPROM memory devices and EEPROM memory device so formed
by
VAJANA
,
BRUNO
Year of Publication
02.07.1997
Get full text
Patent
Save to List
Saved in:
3
Loading…
Mask programmed ROM inviolable by reverse engineering inspections and method of fabrication
by
Vajana
,
Bruno
,
Patelmo, Matteo
Year of Publication
02.09.2003
Get full text
Patent
Save to List
Saved in:
4
Loading…
Mask programmed ROM inviolable by reverse engineering inspections and method of fabrication
by
VAJANA BRUNO
,
PATELMO MATTEO
Year of Publication
02.09.2003
Get full text
Patent
Save to List
Saved in:
5
Loading…
Anti-deciphering contacts
by
Vajana
,
Bruno
,
Patelmo, Matteo
Year of Publication
04.03.2003
Get full text
Patent
Save to List
Saved in:
6
Loading…
Anti-deciphering contacts
by
VAJANA BRUNO
,
PATELMO MATTEO
Year of Publication
04.03.2003
Get full text
Patent
Save to List
Saved in:
7
Loading…
Process for manufacturing electronic devices comprising high voltage MOS transistors, and electronic device thus obtained
by
VAJANA BRUNO
,
PATELMO MATTEO
Year of Publication
31.12.2002
Get full text
Patent
Save to List
Saved in:
8
Loading…
Process for manufacturing electronic devices comprising high voltage MOS transistors, and electronic device thus obtained
by
Vajana
,
Bruno
,
Patelmo, Matteo
Year of Publication
31.12.2002
Get full text
Patent
Save to List
Saved in:
9
Loading…
Integrierte EEPROM-Schaltung mit reduziertem Substrat-Effekt und Zwei-Wannen-Herstellungsverfahren hiervon
by
VAJANA
,
BRUNO
,
BALDI, LIVIO
Year of Publication
26.09.2002
Get full text
Patent
Save to List
Saved in:
10
Loading…
Anti-deciphering contacts
by
VAJANA BRUNO
,
PATELMO MATTEO
Year of Publication
27.06.2002
Get full text
Patent
Save to List
Saved in:
11
Loading…
Anti-deciphering contacts
by
Patelmo, Matteo
,
Vajana
,
Bruno
Year of Publication
27.06.2002
Get full text
Patent
Save to List
Saved in:
12
Loading…
Mask programmed ROM inviolable by reverse engineering inspections and method of fabrication
by
VAJANA BRUNO
,
PATELMO MATTEO
Year of Publication
30.05.2002
Get full text
Patent
Save to List
Saved in:
13
Loading…
Mask programmed ROM inviolable by reverse engineering inspections and method of fabrication
by
Patelmo, Matteo
,
Vajana
,
Bruno
Year of Publication
30.05.2002
Get full text
Patent
Save to List
Saved in:
14
Loading…
Low resistance contact structure for a select transistor of EEPROM memory cells in a NO-DPCC process
by
Libera, Giovanna
,
Vajana
,
Bruno
Year of Publication
23.05.2002
Get full text
Patent
Save to List
Saved in:
15
Loading…
Mask programmed ROM and method of fabrication
by
VAJANA
,
BRUNO
,
PATELMO, MATTEO
Year of Publication
02.05.2002
Get full text
Patent
Save to List
Saved in:
16
Loading…
Anti-deciphering contacts
by
VAJANA
,
BRUNO
,
PATELMO, MATTEO
Year of Publication
03.04.2002
Get full text
Patent
Save to List
Saved in:
17
Loading…
EEPROM integrated device with reduced body effect and twin-well manufacturing process thereof
by
VAJANA
,
BRUNO
,
BALDI, LIVIO
Year of Publication
06.02.2002
Get full text
Patent
Save to List
Saved in:
18
Loading…
Process for manufacturing electronic devices comprising high-voltage MOS and EEPROM transistors
by
VAJANA
,
BRUNO
,
PATELMO, MATTEO
Year of Publication
23.05.2001
Get full text
Patent
Save to List
Saved in:
19
Loading…
Simplified DPCC process for manufacturing FLOTOX EEPROM non-autoaligned semiconductor memory cells
by
VAJANA
,
BRUNO
,
DALLA LIBERA, GIOVANNA
Year of Publication
22.09.2004
Get full text
Patent
Save to List
Saved in:
20
Loading…
Electronic device comprising EEPROM memory cells, HV transistors, and LV transistors with silicided junctions, as well as manufacturing method thereof
by
VAJANA
,
BRUNO
,
DALLA LIBERA, GIOVANNA
,
GALBIATI, NADIA
,
PATELMO, MATTEO
Year of Publication
19.05.2010
Get full text
Patent
Save to List
Saved in:
1
2
3
4
5
6
7
8
9
Next
[9]
RSS Feed
Email Search
Save Search
Search History
Back
Refine Results
Page will reload when a filter is selected or excluded.
Limit to articles from scholarly journals
Limit to articles with full text available
Limit to Open Access content
Exclude newspaper articles
Include articles at other libraries
Expand results using synonyms
Format
Patent
171 results
171
Journal Article
1 results
1
Subject Area
chemistry
139 results
139
medicine
139 results
139
sciences
139 results
139
physics
23 results
23
engineering
1 results
1
Topic
electricity
136 results
136
basic electric elements
125 results
125
electric solid state devices not otherwise provided for
125 results
125
semiconductor devices
125 results
125
physics
23 results
23
information storage
19 results
19
See more
Language
English
141 results
141
German
50 results
50
French
47 results
47
Italian
27 results
27
Danish
1 results
1
Year of Publication
From:
To:
Database
esp@cenet
139 results
139
USPTO Issued Patents
20 results
20
USPTO Published Applications
12 results
12
ScienceDirect Freedom Collection 2013
1 results
1
Elsevier Complete Freedom Collection
1 results
1
ScienceDirect Journal Collection
1 results
1
See more