PMOSFET layout dependency with embedded SiGe Source/Drain at POLY and STI edge in 32/28nm CMOS technology
Song, L., Liang, Y., Onoda, H., Lai, C. W., Wallner, T. A., Pofelski, A., Gruensfelder, C., Josse, E., Okawa, T., Brown, J., Williams, R. Q., Holt, J., Weijtmans, J. W., Greene, B., Utomo, H. K., Lee, S. C., Nair, D., Zhang, Q., Zhu, C., Wu, X., Sherony, M., Lee, Y. M., Henson, W. K., Divakaruni, R., Kaste, E.
Published in Proceedings of Technical Program of 2012 VLSI Technology, System and Application (01.04.2012)
Published in Proceedings of Technical Program of 2012 VLSI Technology, System and Application (01.04.2012)
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