Gamma double prime precipitation kinetic in Alloy 718
Devaux, A., Nazé, L., Molins, R., Pineau, A., Organista, A., Guédou, J.Y., Uginet, J.F., Héritier, P.
Published in Materials science & engineering. A, Structural materials : properties, microstructure and processing (15.07.2008)
Published in Materials science & engineering. A, Structural materials : properties, microstructure and processing (15.07.2008)
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Journal Article
PD-SOI CMOS and SiGe BiCMOS Technologies for 5G and 6G communications
Chevalier, P., Gianesello, F., Pallotta, A., Goncalves, J. Azevedo, Bertrand, G., Borrel, J., Boissonnet, L., Brezza, E., Buczko, M., Canderle, E., Celi, D., Cremer, S., Derrier, N., Diouf, C., Durand, C., Foussadier, F., Garcia, P., Guitard, N., Fleury, A., Gauthier, A., Kermarrec, O., Lajoinie, J., Legrand, C.A., Milon, V., Monsieur, F., Mourier, Y., Muller, D., Ney, D., Paulin, R., Pelloux, N., Renard, C., Rellier, M.L., Scheer, P., Sicard, I., Vulliet, N., Juge, A., Granger, E., Gloria, D., Uginet, J., Garchery, L., Paillardet, F.
Published in 2020 IEEE International Electron Devices Meeting (IEDM) (12.12.2020)
Published in 2020 IEEE International Electron Devices Meeting (IEDM) (12.12.2020)
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Conference Proceeding
2.6GHz ultra-wide voltage range energy efficient dual A9 in 28nm UTBB FD-SOI
Jacquet, D., Cesana, G., Flatresse, P., Arnaud, F., Menut, P., Hasbani, F., Di Gilio, T., Lecocq, C., Roy, T., Chhabra, A., Grover, C., Minez, O., Uginet, J., Durieu, G., Nyer, F., Adobati, C., Wilson, R., Casalotto, D.
Published in 2013 Symposium on VLSI Technology (01.06.2013)
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Published in 2013 Symposium on VLSI Technology (01.06.2013)
Conference Proceeding
2.6GHz ultra-wide voltage range energy efficient dual A9 in 28nm UTBB FD-SOI
Jacquet, D., Cesana, G., Flatresse, P., Arnaud, F., Menut, P., Hasbani, F., Di Gilio, T., Lecocq, C., Roy, T., Chhabra, A., Grover, C., Minez, O., Uginet, J., Durieu, G., Nyer, F., Adobati, C., Wilson, R., Casalotto, D.
Published in 2013 Symposium on VLSI Circuits (01.06.2013)
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Published in 2013 Symposium on VLSI Circuits (01.06.2013)
Conference Proceeding
A functional 0.69 /spl mu/m/sup 2/ embedded 6T-SRAM bit cell for 65 nm CMOS platform
Arnaud, F., Boeuf, F., Salvetti, F., Lenoble, D., Wacquant, F., Regnier, C., Morin, P., Emonet, N., Denis, E., Oberlin, J.C., Ceccarelli, D., Vannier, P., Imbert, G., Sicard, A., Perrot, C., Belmont, O., Guilmeau, I., Sassoulas, P.O., Delmedico, S., Palla, R., Leverd, F., Beverina, A., DeJonghe, V., Broekaart, M., Pain, L., Todeschini, J., Charpin, M., Laplanche, Y., Neira, D., Vachellerie, V., Borot, B., Devoivre, T., Bicais, N., Hinschberger, B., Pantel, R., Revil, N., Parthasarathy, C., Planes, N., Brut, H., Farkas, J., Uginet, J., Stolk, P., Woo, M.
Published in 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407) (2003)
Published in 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407) (2003)
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Conference Proceeding