A 1-58.125Gb/s, 5-33dB IL Multi-Protocol Ethernet-Compliant Analog PAM-4 Receiver with 16 DFE Taps in 10nm
Zand, Bahram, Bichan, Mike, Mahmoodi, Alireza, Shashaani, Mansour, Wang, Jing, Shulyzki, Ruslana, Guthrie, James, Tyshchenko, Katya, Zhao, Junhong, Liu, Eric, Soltani, Nima, Freeman, Al, Anand, Rishi, Rubab, Syed, Khela, Ranjit, Sharifian, Shaham, Herterich, Karl
Published in 2022 IEEE International Solid- State Circuits Conference (ISSCC) (20.02.2022)
Published in 2022 IEEE International Solid- State Circuits Conference (ISSCC) (20.02.2022)
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Conference Proceeding
A 32Gb/s NRZ 37dB SerDes in 10nm CMOS to Support PCI Express Gen 5 Protocol
Bichan, Mike, Ting, Clifford, Zand, Bahram, Wang, Jing, Shulyzki, Ruslana, Guthrie, James, Tyshchenko, Katya, Zhao, Junhong, Parsafar, Alireza, Liu, Eric, Vatankhahghadim, Aynaz, Sharifian, Shaham, Tyshchenko, Aleksey, De Vita, Michael, Rubab, Syed, Iyer, Sitaraman, Spagna, Fulvio, Dolev, Noam
Published in 2020 IEEE Custom Integrated Circuits Conference (CICC) (01.03.2020)
Published in 2020 IEEE Custom Integrated Circuits Conference (CICC) (01.03.2020)
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Conference Proceeding