11.1 A 512Gb 3b/cell flash memory on 64-word-line-layer BiCS technology
Yamashita, Ryuji, Magia, Sagar, Higuchi, Tsutomu, Yoneya, Kazuhide, Yamamura, Toshio, Mizukoshi, Hiroyuki, Zaitsu, Shingo, Yamashita, Minoru, Toyama, Shunichi, Kamae, Norihiro, Lee, Juan, Shuo Chen, Jiawei Tao, Mak, William, Xiaohua Zhang, Ying Yu, Utsunomiya, Yuko, Kato, Yosuke, Sakai, Manabu, Matsumoto, Masahide, Chibvongodze, Hardwell, Ookuma, Naoki, Yabe, Hiroki, Taigor, Subodh, Samineni, Rangarao, Kodama, Takuyo, Kamata, Yoshihiko, Namai, Yuzuru, Huynh, Jonathan, Sung-En Wang, Yankang He, Trung Pham, Saraf, Vivek, Petkar, Akshay, Watanabe, Mitsuyuki, Hayashi, Koichiro, Swarnkar, Prashant, Miwa, Hitoshi, Pradhan, Aditya, Dey, Sulagna, Dwibedy, Debasish, Xavier, Thushara, Balaga, Muralikrishna, Agarwal, Samiksha, Kulkarni, Swaroop, Papasaheb, Zameer, Deora, Sahil, Hong, Patrick, Meiling Wei, Balakrishnan, Gopinath, Ariki, Takuya, Verma, Kapil, Chang Siau, Yingda Dong, Ching-Huang Lu, Miwa, Toru, Moogat, Farookh
Published in 2017 IEEE International Solid-State Circuits Conference (ISSCC) (01.02.2017)
Published in 2017 IEEE International Solid-State Circuits Conference (ISSCC) (01.02.2017)
Get full text
Conference Proceeding
Semiconductor memory device and method of verifying the same
Senoo, Makoto, Kido, Kazunari, Toyama, Shunichi, Tsukidate, Yoshihiro
Year of Publication 22.09.2009
Get full text
Year of Publication 22.09.2009
Patent