A review on SRAM-based computing in-memory: Circuits, functions, and applications
Lin, Zhiting, Tong, Zhongzhen, Zhang, Jin, Wang, Fangming, Xu, Tian, Zhao, Yue, Wu, Xiulong, Peng, Chunyu, Lu, Wenjuan, Zhao, Qiang, Chen, Junning
Published in Journal of semiconductors (01.03.2022)
Published in Journal of semiconductors (01.03.2022)
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Journal Article
In-MRAM Computing Based on Complementary-Sensing Time-Based Readout Circuit Using Hybrid VGSOT-MTJ/GAA-CNTFET
Tong, Zhongzhen, Sun, Sifan, Zhang, Kaili, Li, Chenghang, Zhou, Daming, Wang, Zhaohao, Lin, Xiaoyang, Zhao, Weisheng
Published in IEEE transactions on circuits and systems. II, Express briefs (12.09.2024)
Published in IEEE transactions on circuits and systems. II, Express briefs (12.09.2024)
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Journal Article
A Computing In-Memory Multibit Multiplication Based on Decoupling and In-Array Storing
Zhang, Jin, Tong, Zhongzhen, Wang, Hao, Wang, Xin, Zhao, Qiang, Zhou, Jian, Wang, Jiaqun, Lin, Zhiting, Wu, Xiulong
Published in IEEE transactions on circuits and systems. I, Regular papers (01.08.2024)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.08.2024)
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Journal Article
In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations
Lin, Zhiting, Tong, Zhongzhen, Wang, Fangming, Zhang, Jin, Zhao, Yue, Sun, Peng, Xu, Tian, Zhang, Cheng, Li, Xingwei, Wu, Xiulong, Lu, Wenjuan, Peng, Chunyu, Zhao, Qiang, Chen, Junning
Published in IEEE journal of solid-state circuits (01.05.2023)
Published in IEEE journal of solid-state circuits (01.05.2023)
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Journal Article
Configurable Memory With a Multilevel Shared Structure Enabling In-Memory Computing
Zhao, Yue, Lin, Zhiting, Wu, Xiulong, Zhao, Qiang, Lu, Wenjuan, Peng, Chunyu, Tong, Zhongzhen, Chen, Junning
Published in IEEE transactions on very large scale integration (VLSI) systems (01.05.2022)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.05.2022)
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Journal Article
A Charge-Domain Compute-In-Memory Macro With Cell-Embedded DA Conversion and Two-Stage AD Conversion for Bit-Scalable MAC Operation
Zhang, Kaili, Tong, Zhongzhen, Liang, Xinxin, Wang, Chengzhi, Wang, You, Zhang, Yue, Zhao, Weisheng, Zeng, Lang, Zhang, Deming
Published in IEEE transactions on circuits and systems. II, Express briefs (01.03.2024)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.03.2024)
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Journal Article
A High Throughput In-MRAM-Computing Scheme Using Hybrid p-SOT-MTJ/GAA-CNTFET
Tong, Zhongzhen, Xu, Yilin, Liu, Yunlong, Duan, Xinrui, Tang, Hao, Zhao, Suteng, Li, Chenghang, Lin, Zhiting, Wu, Xiulong, Wang, Zhaohao, Lin, Xiaoyang
Published in IEEE transactions on circuits and systems. I, Regular papers (01.02.2024)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.02.2024)
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Journal Article
BSTCIM: A Balanced Symmetry Ternary Fully Digital In-MRAM Computing Macro for Energy Efficiency Neural Network
Tong, Zhongzhen, Li, Chenghang, Wang, Chao, Zhao, Suteng, Peng, Qianyong, Yan, Zhenyu, Zhang, Siqi, Zhou, Daming, Wang, Zhaohao, Lin, Xiaoyang, Zhao, Weisheng
Published in IEEE transactions on circuits and systems. I, Regular papers (09.08.2024)
Published in IEEE transactions on circuits and systems. I, Regular papers (09.08.2024)
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Journal Article
In-Memory Multibit Multiplication Based on Bitline Shifting
Zhang, Jin, Lin, Zhiting, Wu, Xiulong, Tong, Zhongzhen, Peng, Chunyu, Lu, Wenjuan, Zhao, Qiang, Wu, Hongbiao, Chen, Junning
Published in IEEE transactions on circuits and systems. II, Express briefs (01.02.2022)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.02.2022)
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Journal Article
A Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations and Results Store
Lin, Zhiting, Zhang, Shaoying, Jin, Qian, Xia, Jianping, Liu, Yunwei, Yu, Kefeng, Zheng, Jian, Xu, Xiaoming, Fan, Xing, Li, Ke, Tong, Zhongzhen, Wu, Xiulong, Lu, Wenjuan, Peng, Chunyu, Zhao, Qiang
Published in IEEE transactions on very large scale integration (VLSI) systems (01.06.2023)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.06.2023)
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Journal Article
Configurable and High-Throughput CIM SRAM for Boolean Logic Operation With 321 GOPS/kb and 164395.6 GOPS/mm2
Lin, Zhiting, Jin, Qian, Tong, Zhongzhen, Li, Guangdong, Gu, Shuo, Li, Jingzheng, Wang, Ruixuan, Shu, Xinglong, Yu, Shuiyue, Yan, Shengyuan, Liu, Li, Hao, Licai, Zhao, Qiang, Peng, Chunyu, Wu, Xiulong
Published in IEEE solid-state circuits letters (2023)
Published in IEEE solid-state circuits letters (2023)
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Journal Article
Configurable and High-Throughput CIM SRAM for Boolean Logic Operation With 321 GOPS/kb and 164395.6 GOPS/mm 2
Lin, Zhiting, Jin, Qian, Tong, Zhongzhen, Li, Guangdong, Gu, Shuo, Li, Jingzheng, Wang, Ruixuan, Shu, Xinglong, Yu, Shuiyue, Yan, Shengyuan, Liu, Li, Hao, Licai, Zhao, Qiang, Peng, Chunyu, Wu, Xiulong
Published in IEEE solid-state circuits letters (2023)
Published in IEEE solid-state circuits letters (2023)
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Journal Article
An offset cancellation technique for SRAM sense amplifier based on relation of the delay and offset
Zhao, Yue, Wang, Jinkai, Tong, Zhongzhen, Wu, Xiulong, Peng, Chunyu, Lu, Wenjuan, Zhao, Qiang, Lin, Zhiting
Published in Microelectronics (01.10.2022)
Published in Microelectronics (01.10.2022)
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Journal Article
Configurable in-memory computing architecture based on dual-port SRAM
Zhao, Yue, Liu, Yunlong, Zheng, Jian, Tong, Zhongzhen, Wang, Xin, Yu, Runru, Wu, Xiulong, Zhou, Yongliang, Peng, Chunyu, Lu, Wenjuan, Zhao, Qiang, Lin, Zhiting
Published in Microelectronics (01.05.2024)
Published in Microelectronics (01.05.2024)
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Journal Article