Novel 2-Bit/Cell Metal–Oxide–Nitride–Oxide–Semiconductor Memory Device with Wrapped-Control-Gate Structure That Achieves Source-Side Hot-Electron Injection
Tomiye, Hideto, Terano, Toshio, Nomoto, Kazumasa, Kobayashi, Toshio
Published in Japanese Journal of Applied Physics (01.07.2005)
Published in Japanese Journal of Applied Physics (01.07.2005)
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Journal Article
Metal–Oxide–Nitride–Oxide–Semiconductor Memory Device with One-Side Halo Implantation to Enable Low-Voltage Operation Using Hot-Carrier Injection
Tomiye, Hideto, Nomoto, Kazumasa, Koyama, Kazuhide, Kobayashi, Toshio
Published in Japanese Journal of Applied Physics (01.09.2005)
Published in Japanese Journal of Applied Physics (01.09.2005)
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Journal Article
Scanning Capacitace Microscope/Atomic Force Microscope/Scanning Tunneling Microscope Study of Ion-Implanted Silicon Surfaces
Hideto Tomiye, Hideto Tomiye, Hiroshi Kawami, Hiroshi Kawami, Michiyoshi Izawa, Michiyoshi Izawa, Masamichi Yoshimura, Masamichi Yoshimura, Takafumi Yao, Takafumi Yao
Published in Japanese Journal of Applied Physics (01.06.1995)
Published in Japanese Journal of Applied Physics (01.06.1995)
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Journal Article
Scanning capacitance microscope/atomic force microscope/scanning tunneling microscope study of ion-implanted silicon surfaces
TOMIYE, H, KAWAMI, H, IZAWA, M, YOSHIMURA, M, YAO, T
Published in Japanese Journal of Applied Physics (01.06.1995)
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Published in Japanese Journal of Applied Physics (01.06.1995)
Conference Proceeding
Journal Article
A novel 2-bit/cell MONOS memory device with a wrapped-control-gate structure that applies source-side hot-electron injection
Tomiye, H., Terano, T., Nomoto, K., Kobayashi, T.
Published in 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303) (2002)
Published in 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303) (2002)
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Conference Proceeding